AMDGPU: Fix broken check lines in test

llvm-svn: 331796

diff --git a/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll b/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
index 77a6820713d6dc58dd3e04896be3608f1850b9c3..0241490de7a5a51411a1adf87d0fa312c5835c1d 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
+++ b/llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
@@ -1,9 +1,9 @@
-; RUN:  llc -amdgpu-scalarize-global-loads=false  -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=SI %s
-; RUN:  llc -amdgpu-scalarize-global-loads=false  -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=VI %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI %s
 
-; CHECK-LABEL: {{^}}trunc_i64_bitcast_v2i32:
-; CHECK: buffer_load_dword v
-; CHECK: buffer_store_dword v
+; GCN-LABEL: {{^}}trunc_i64_bitcast_v2i32:
+; GCN: buffer_load_dword v
+; GCN: buffer_store_dword v
 define amdgpu_kernel void @trunc_i64_bitcast_v2i32(i32 addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
   %ld = load <2 x i32>, <2 x i32> addrspace(1)* %in
   %bc = bitcast <2 x i32> %ld to i64
@@ -12,9 +12,9 @@ define amdgpu_kernel void @trunc_i64_bitcast_v2i32(i32 addrspace(1)* %out, <2 x
   ret void
 }
 
-; CHECK-LABEL: {{^}}trunc_i96_bitcast_v3i32:
-; CHECK: buffer_load_dword v
-; CHECK: buffer_store_dword v
+; GCN-LABEL: {{^}}trunc_i96_bitcast_v3i32:
+; GCN: buffer_load_dword v
+; GCN: buffer_store_dword v
 define amdgpu_kernel void @trunc_i96_bitcast_v3i32(i32 addrspace(1)* %out, <3 x i32> addrspace(1)* %in) {
   %ld = load <3 x i32>, <3 x i32> addrspace(1)* %in
   %bc = bitcast <3 x i32> %ld to i96
@@ -23,9 +23,9 @@ define amdgpu_kernel void @trunc_i96_bitcast_v3i32(i32 addrspace(1)* %out, <3 x
   ret void
 }
 
-; CHECK-LABEL: {{^}}trunc_i128_bitcast_v4i32:
-; CHECK: buffer_load_dword v
-; CHECK: buffer_store_dword v
+; GCN-LABEL: {{^}}trunc_i128_bitcast_v4i32:
+; GCN: buffer_load_dword v
+; GCN: buffer_store_dword v
 define amdgpu_kernel void @trunc_i128_bitcast_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
   %ld = load <4 x i32>, <4 x i32> addrspace(1)* %in
   %bc = bitcast <4 x i32> %ld to i128
@@ -35,9 +35,9 @@ define amdgpu_kernel void @trunc_i128_bitcast_v4i32(i32 addrspace(1)* %out, <4 x
 }
 
 ; Don't want load width reduced in this case.
-; CHECK-LABEL: {{^}}trunc_i16_bitcast_v2i16:
-; CHECK: buffer_load_dword [[VAL:v[0-9]+]]
-; CHECK: buffer_store_short [[VAL]]
+; GCN-LABEL: {{^}}trunc_i16_bitcast_v2i16:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: buffer_store_short [[VAL]]
 define amdgpu_kernel void @trunc_i16_bitcast_v2i16(i16 addrspace(1)* %out, <2 x i16> addrspace(1)* %in) {
   %ld = load <2 x i16>, <2 x i16> addrspace(1)* %in
   %bc = bitcast <2 x i16> %ld to i32
@@ -46,14 +46,14 @@ define amdgpu_kernel void @trunc_i16_bitcast_v2i16(i16 addrspace(1)* %out, <2 x
   ret void
 }
 
-; CHECK-LABEL: {{^}}trunc_i16_bitcast_v4i16:
+; GCN-LABEL: {{^}}trunc_i16_bitcast_v4i16:
 ; FIXME We need to teach the dagcombiner to reduce load width for:
 ;   t21: v2i32,ch = load<LD8[%in(addrspace=1)]> t12, t10, undef:i64
 ;        t23: i64 = bitcast t21
 ;      t30: i16 = truncate t23
 ; SI: buffer_load_dword v[[VAL:[0-9]+]]
 ; VI: buffer_load_dwordx2 v{{\[}}[[VAL:[0-9]+]]
-; CHECK: buffer_store_short [[VAL]]
+; GCN: buffer_store_short v[[VAL]], off
 define amdgpu_kernel void @trunc_i16_bitcast_v4i16(i16 addrspace(1)* %out, <4 x i16> addrspace(1)* %in) {
   %ld = load <4 x i16>, <4 x i16> addrspace(1)* %in
   %bc = bitcast <4 x i16> %ld to i64
@@ -62,10 +62,11 @@ define amdgpu_kernel void @trunc_i16_bitcast_v4i16(i16 addrspace(1)* %out, <4 x
   ret void
 }
 
-; FIXME: Don't want load width reduced in this case.
-; CHECK-LABEL: {{^}}trunc_i8_bitcast_v2i8:
-; CHECK: buffer_load_ubyte [[VAL:v[0-9]+]]
-; CHECK: buffer_store_byte [[VAL]]
+; FIXME: Consistently shrink or not here
+; GCN-LABEL: {{^}}trunc_i8_bitcast_v2i8:
+; SI: buffer_load_ubyte [[VAL:v[0-9]+]]
+; VI: buffer_load_ushort [[VAL:v[0-9]+]]
+; GCN: buffer_store_byte [[VAL]]
 define amdgpu_kernel void @trunc_i8_bitcast_v2i8(i8 addrspace(1)* %out, <2 x i8> addrspace(1)* %in) {
   %ld = load <2 x i8>, <2 x i8> addrspace(1)* %in
   %bc = bitcast <2 x i8> %ld to i16
@@ -74,9 +75,9 @@ define amdgpu_kernel void @trunc_i8_bitcast_v2i8(i8 addrspace(1)* %out, <2 x i8>
   ret void
 }
 
-; CHECK-LABEL: {{^}}trunc_i32_bitcast_v4i8:
-; CHECK: buffer_load_dword [[VAL:v[0-9]+]]
-; CHECK: buffer_store_byte [[VAL]]
+; GCN-LABEL: {{^}}trunc_i32_bitcast_v4i8:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: buffer_store_byte [[VAL]]
 define amdgpu_kernel void @trunc_i32_bitcast_v4i8(i8 addrspace(1)* %out, <4 x i8> addrspace(1)* %in) {
   %ld = load <4 x i8>, <4 x i8> addrspace(1)* %in
   %bc = bitcast <4 x i8> %ld to i32
@@ -85,9 +86,9 @@ define amdgpu_kernel void @trunc_i32_bitcast_v4i8(i8 addrspace(1)* %out, <4 x i8
   ret void
 }
 
-; CHECK-LABEL: {{^}}trunc_i24_bitcast_v3i8:
-; CHECK: buffer_load_dword [[VAL:v[0-9]+]]
-; CHECK: buffer_store_byte [[VAL]]
+; GCN-LABEL: {{^}}trunc_i24_bitcast_v3i8:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: buffer_store_byte [[VAL]]
 define amdgpu_kernel void @trunc_i24_bitcast_v3i8(i8 addrspace(1)* %out, <3 x i8> addrspace(1)* %in) {
   %ld = load <3 x i8>, <3 x i8> addrspace(1)* %in
   %bc = bitcast <3 x i8> %ld to i24