[X86] combine-and.ll - add 256 and 512 bit test coverage for scalar broadcast

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D139991

diff --git a/llvm/test/CodeGen/X86/combine-and.ll b/llvm/test/CodeGen/X86/combine-and.ll
index 73b512c..09abb86 100644 (file)
--- a/llvm/test/CodeGen/X86/combine-and.ll
+++ b/llvm/test/CodeGen/X86/combine-and.ll
@@ -486,6 +486,200 @@ define <16 x i8> @PR34620(<16 x i8> %a0, <16 x i8> %a1) {
 ; Simplify and with a broadcasted negated scalar
 ;
 
+define <8 x i64> @neg_scalar_broadcast_v8i64_arg(i64 %a0, <8 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v8i64_arg:
+; SSE:       # %bb.0:
+; SSE-NEXT:    notq %rdi
+; SSE-NEXT:    movq %rdi, %xmm4
+; SSE-NEXT:    pshufd {{.*#+}} xmm4 = xmm4[0,1,0,1]
+; SSE-NEXT:    pand %xmm4, %xmm0
+; SSE-NEXT:    pand %xmm4, %xmm1
+; SSE-NEXT:    pand %xmm4, %xmm2
+; SSE-NEXT:    pand %xmm4, %xmm3
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v8i64_arg:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    notq %rdi
+; AVX1-NEXT:    vmovq %rdi, %xmm2
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,1]
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm2, %ymm2
+; AVX1-NEXT:    vandps %ymm0, %ymm2, %ymm0
+; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v8i64_arg:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    notq %rdi
+; AVX2-NEXT:    vmovq %rdi, %xmm2
+; AVX2-NEXT:    vpbroadcastq %xmm2, %ymm2
+; AVX2-NEXT:    vpand %ymm0, %ymm2, %ymm0
+; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v8i64_arg:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    notq %rdi
+; AVX512-NEXT:    vpbroadcastq %rdi, %zmm1
+; AVX512-NEXT:    vpandq %zmm0, %zmm1, %zmm0
+; AVX512-NEXT:    retq
+  %1 = xor i64 %a0, -1
+  %2 = insertelement <8 x i64> undef, i64 %1, i64 0
+  %3 = shufflevector <8 x i64> %2, <8 x i64> poison, <8 x i32> zeroinitializer
+  %4 = and <8 x i64> %3, %a1
+  ret <8 x i64> %4
+}
+
+define <8 x i64> @neg_scalar_broadcast_v8i64(i64 %a0, <2 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v8i64:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movdqa %xmm0, %xmm2
+; SSE-NEXT:    notq %rdi
+; SSE-NEXT:    movq %rdi, %xmm0
+; SSE-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[0,1,0,1]
+; SSE-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
+; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,3,2,3]
+; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
+; SSE-NEXT:    pand %xmm4, %xmm0
+; SSE-NEXT:    pand %xmm4, %xmm1
+; SSE-NEXT:    pand %xmm4, %xmm2
+; SSE-NEXT:    pand %xmm4, %xmm3
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v8i64:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX1-NEXT:    notq %rdi
+; AVX1-NEXT:    vmovq %rdi, %xmm1
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm1, %ymm1
+; AVX1-NEXT:    vpermilps {{.*#+}} xmm2 = xmm0[0,1,0,1]
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT:    vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,3]
+; AVX1-NEXT:    vandpd %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    vandpd %ymm1, %ymm2, %ymm1
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v8i64:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX2-NEXT:    notq %rdi
+; AVX2-NEXT:    vmovq %rdi, %xmm1
+; AVX2-NEXT:    vpbroadcastq %xmm1, %ymm1
+; AVX2-NEXT:    vpermq {{.*#+}} ymm2 = ymm0[0,1,0,0]
+; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[1,0,1,1]
+; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v8i64:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NEXT:    notq %rdi
+; AVX512-NEXT:    vpbroadcastq %rdi, %zmm1
+; AVX512-NEXT:    vmovdqa64 {{.*#+}} zmm2 = [1,0,1,1,0,1,0,0]
+; AVX512-NEXT:    vpermq %zmm0, %zmm2, %zmm0
+; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
+; AVX512-NEXT:    retq
+  %1 = xor i64 %a0, -1
+  %2 = insertelement <8 x i64> undef, i64 %1, i64 0
+  %3 = shufflevector <8 x i64> %2, <8 x i64> poison, <8 x i32> zeroinitializer
+  %4 = shufflevector <2 x i64> %a1, <2 x i64> poison, <8 x i32> <i32 1, i32 0, i32 1, i32 1, i32 0, i32 1, i32 0, i32 0>
+  %5 = and <8 x i64> %4, %3
+  ret <8 x i64> %5
+}
+
+define <4 x i64> @neg_scalar_broadcast_v4i64_arg(i64 %a0, <4 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v4i64_arg:
+; SSE:       # %bb.0:
+; SSE-NEXT:    notq %rdi
+; SSE-NEXT:    movq %rdi, %xmm2
+; SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,1,0,1]
+; SSE-NEXT:    pand %xmm2, %xmm0
+; SSE-NEXT:    pand %xmm2, %xmm1
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v4i64_arg:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    notq %rdi
+; AVX1-NEXT:    vmovq %rdi, %xmm1
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm1, %ymm1
+; AVX1-NEXT:    vandps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v4i64_arg:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    notq %rdi
+; AVX2-NEXT:    vmovq %rdi, %xmm1
+; AVX2-NEXT:    vpbroadcastq %xmm1, %ymm1
+; AVX2-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v4i64_arg:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    notq %rdi
+; AVX512-NEXT:    vpbroadcastq %rdi, %ymm1
+; AVX512-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; AVX512-NEXT:    retq
+  %1 = xor i64 %a0, -1
+  %2 = insertelement <4 x i64> undef, i64 %1, i64 0
+  %3 = shufflevector <4 x i64> %2, <4 x i64> poison, <4 x i32> zeroinitializer
+  %4 = and <4 x i64> %3, %a1
+  ret <4 x i64> %4
+}
+
+define <4 x i64> @neg_scalar_broadcast_v4i64(i64 %a0, <2 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v4i64:
+; SSE:       # %bb.0:
+; SSE-NEXT:    notq %rdi
+; SSE-NEXT:    movq %rdi, %xmm1
+; SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,1,0,1]
+; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
+; SSE-NEXT:    pand %xmm2, %xmm0
+; SSE-NEXT:    pand %xmm2, %xmm1
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v4i64:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX1-NEXT:    notq %rdi
+; AVX1-NEXT:    vmovq %rdi, %xmm1
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm1, %ymm1
+; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
+; AVX1-NEXT:    vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,3]
+; AVX1-NEXT:    vandpd %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v4i64:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX2-NEXT:    notq %rdi
+; AVX2-NEXT:    vmovq %rdi, %xmm1
+; AVX2-NEXT:    vpbroadcastq %xmm1, %ymm1
+; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[1,0,1,1]
+; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v4i64:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
+; AVX512-NEXT:    notq %rdi
+; AVX512-NEXT:    vpbroadcastq %rdi, %ymm1
+; AVX512-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[1,0,1,1]
+; AVX512-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; AVX512-NEXT:    retq
+  %1 = xor i64 %a0, -1
+  %2 = insertelement <4 x i64> undef, i64 %1, i64 0
+  %3 = shufflevector <4 x i64> %2, <4 x i64> poison, <4 x i32> zeroinitializer
+  %4 = shufflevector <2 x i64> %a1, <2 x i64> poison, <4 x i32> <i32 1, i32 0, i32 1, i32 1>
+  %5 = and <4 x i64> %4, %3
+  ret <4 x i64> %5
+}
+
 define <2 x i64> @neg_scalar_broadcast_v2i64(i64 %a0, <2 x i64> %a1) {
 ; SSE-LABEL: neg_scalar_broadcast_v2i64:
 ; SSE:       # %bb.0:
@@ -524,6 +718,38 @@ define <2 x i64> @neg_scalar_broadcast_v2i64(i64 %a0, <2 x i64> %a1) {
   ret <2 x i64> %4
 }
 
+define <2 x i64> @casted_neg_scalar_broadcast_v2i64(<2 x i32> %a0, <2 x i64> %a1) {
+; SSE-LABEL: casted_neg_scalar_broadcast_v2i64:
+; SSE:       # %bb.0:
+; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
+; SSE-NEXT:    pandn %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: casted_neg_scalar_broadcast_v2i64:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
+; AVX1-NEXT:    vandnps %xmm1, %xmm0, %xmm0
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: casted_neg_scalar_broadcast_v2i64:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
+; AVX2-NEXT:    vandnps %xmm1, %xmm0, %xmm0
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: casted_neg_scalar_broadcast_v2i64:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
+; AVX512-NEXT:    vandnps %xmm1, %xmm0, %xmm0
+; AVX512-NEXT:    retq
+  %1 = xor <2 x i32> %a0, <i32 -1, i32 -1>
+  %2 = bitcast <2 x i32> %1 to i64
+  %3 = insertelement <2 x i64> undef, i64 %2, i64 0
+  %4 = shufflevector <2 x i64> %3, <2 x i64> poison, <2 x i32> zeroinitializer
+  %5 = and <2 x i64> %4, %a1
+  ret <2 x i64> %5
+}
+
 define <8 x i32> @neg_scalar_broadcast_v8i32(i32 %a0, <8 x i32> %a1) {
 ; SSE-LABEL: neg_scalar_broadcast_v8i32:
 ; SSE:       # %bb.0:
@@ -692,6 +918,98 @@ define <64 x i8> @neg_scalar_broadcast_v64i8(i8 %a0, <64 x i8> %a1) {
   ret <64 x i8> %4
 }
 
+define <8 x i64> @neg_scalar_broadcast_v64i8_v8i64(i8 %a0, <8 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v64i8_v8i64:
+; SSE:       # %bb.0:
+; SSE-NEXT:    notb %dil
+; SSE-NEXT:    movzbl %dil, %eax
+; SSE-NEXT:    movd %eax, %xmm4
+; SSE-NEXT:    pxor %xmm5, %xmm5
+; SSE-NEXT:    pshufb %xmm5, %xmm4
+; SSE-NEXT:    pand %xmm4, %xmm0
+; SSE-NEXT:    pand %xmm4, %xmm1
+; SSE-NEXT:    pand %xmm4, %xmm2
+; SSE-NEXT:    pand %xmm4, %xmm3
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v64i8_v8i64:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    notb %dil
+; AVX1-NEXT:    vmovd %edi, %xmm2
+; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
+; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm2, %ymm2
+; AVX1-NEXT:    vandps %ymm0, %ymm2, %ymm0
+; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v64i8_v8i64:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    notb %dil
+; AVX2-NEXT:    vmovd %edi, %xmm2
+; AVX2-NEXT:    vpbroadcastb %xmm2, %ymm2
+; AVX2-NEXT:    vpand %ymm0, %ymm2, %ymm0
+; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v64i8_v8i64:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    notb %dil
+; AVX512-NEXT:    vpbroadcastb %edi, %zmm1
+; AVX512-NEXT:    vpandq %zmm0, %zmm1, %zmm0
+; AVX512-NEXT:    retq
+  %1 = xor i8 %a0, -1
+  %2 = insertelement <64 x i8> undef, i8 %1, i64 0
+  %3 = shufflevector <64 x i8> %2, <64 x i8> poison, <64 x i32> zeroinitializer
+  %4 = bitcast <64 x i8> %3 to <8 x i64>
+  %5 = and <8 x i64> %4, %a1
+  ret <8 x i64> %5
+}
+
+define <4 x i64> @neg_scalar_broadcast_v32i8_v4i64(i8 %a0, <4 x i64> %a1) {
+; SSE-LABEL: neg_scalar_broadcast_v32i8_v4i64:
+; SSE:       # %bb.0:
+; SSE-NEXT:    notb %dil
+; SSE-NEXT:    movzbl %dil, %eax
+; SSE-NEXT:    movd %eax, %xmm2
+; SSE-NEXT:    pxor %xmm3, %xmm3
+; SSE-NEXT:    pshufb %xmm3, %xmm2
+; SSE-NEXT:    pand %xmm2, %xmm0
+; SSE-NEXT:    pand %xmm2, %xmm1
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: neg_scalar_broadcast_v32i8_v4i64:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    notb %dil
+; AVX1-NEXT:    vmovd %edi, %xmm1
+; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
+; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm1, %ymm1
+; AVX1-NEXT:    vandps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: neg_scalar_broadcast_v32i8_v4i64:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    notb %dil
+; AVX2-NEXT:    vmovd %edi, %xmm1
+; AVX2-NEXT:    vpbroadcastb %xmm1, %ymm1
+; AVX2-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; AVX2-NEXT:    retq
+;
+; AVX512-LABEL: neg_scalar_broadcast_v32i8_v4i64:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    notb %dil
+; AVX512-NEXT:    vpbroadcastb %edi, %ymm1
+; AVX512-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; AVX512-NEXT:    retq
+  %1 = xor i8 %a0, -1
+  %2 = insertelement <32 x i8> undef, i8 %1, i64 0
+  %3 = shufflevector <32 x i8> %2, <32 x i8> poison, <32 x i32> zeroinitializer
+  %4 = bitcast <32 x i8> %3 to <4 x i64>
+  %5 = and <4 x i64> %4, %a1
+  ret <4 x i64> %5
+}
+
 define <2 x i64> @neg_scalar_broadcast_v16i8_v2i64(i8 %a0, <2 x i64> %a1) {
 ; SSE-LABEL: neg_scalar_broadcast_v16i8_v2i64:
 ; SSE:       # %bb.0: