2010-10-07 Tejas Belagod <tejas.belagod@arm.com>
authorbelagod <belagod@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 7 Oct 2010 16:00:06 +0000 (16:00 +0000)
committerbelagod <belagod@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 7 Oct 2010 16:00:06 +0000 (16:00 +0000)
PR target/45805
        * config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
        constraint, add register specifier in instruction template.
        (neon_vec_pack_trunc_<mode>): Likewise.
        (neon_vec_<US>mult_<mode>): Add register specifier to
        instruction template.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@165122 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/neon.md

index 87391d9..d088f60 100644 (file)
@@ -1,3 +1,11 @@
+2010-10-07  Tejas Belagod  <tejas.belagod@arm.com>
+
+       * config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
+       constraint, add register specifier in instruction template.
+       (neon_vec_pack_trunc_<mode>): Likewise.
+       (neon_vec_<US>mult_<mode>): Add register specifier to
+       instruction template.
+
 2010-10-07  Dave Korn  <dave.korn.cygwin@gmail.com>
 
        * config.gcc (c_target_objs)[i?86-*-pe|i?86-*-cygwin*]: Don't add
index cd91573..c788f16 100644 (file)
 ;; Vectorize for non-neon-quad case
 (define_insn "neon_unpack<US>_<mode>"
  [(set (match_operand:<V_widen> 0 "register_operand" "=w")
-       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "")))]
+       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "w")))]
  "TARGET_NEON"
- "vmovl.<US><V_sz_elem> %q0, %1"
+ "vmovl.<US><V_sz_elem> %q0, %P1"
   [(set_attr "neon_type" "neon_shift_1")]
 )
 
                       (SE:<V_widen> 
                           (match_operand:VDI 2 "register_operand" "w"))))]
   "TARGET_NEON"
-  "vmull.<US><V_sz_elem> %q0, %1, %2"
+  "vmull.<US><V_sz_elem> %q0, %P1, %P2"
   [(set_attr "neon_type" "neon_shift_1")]
 )
 
 ;; For the non-quad case.
 (define_insn "neon_vec_pack_trunc_<mode>"
  [(set (match_operand:<V_narrow> 0 "register_operand" "=w")
-       (truncate:<V_narrow> (match_operand:VN 1 "register_operand" "")))]
+       (truncate:<V_narrow> (match_operand:VN 1 "register_operand" "w")))]
  "TARGET_NEON"
- "vmovn.i<V_sz_elem>\t%0, %q1"
+ "vmovn.i<V_sz_elem>\t%P0, %q1"
  [(set_attr "neon_type" "neon_shift_1")]
 )