ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
authorStephen Warren <swarren@nvidia.com>
Wed, 6 Nov 2013 22:45:46 +0000 (15:45 -0700)
committerStephen Warren <swarren@nvidia.com>
Wed, 11 Dec 2013 23:43:11 +0000 (16:43 -0700)
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
arch/arm/mach-tegra/powergate.c
drivers/gpu/drm/tegra/gr3d.c
drivers/pci/host/pci-tegra.c
include/linux/tegra-powergate.h

index 85d28e7..f6f5b54 100644 (file)
@@ -25,6 +25,7 @@
 #include <linux/export.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/reset.h>
 #include <linux/seq_file.h>
 #include <linux/spinlock.h>
 #include <linux/clk/tegra.h>
@@ -144,11 +145,12 @@ int tegra_powergate_remove_clamping(int id)
 }
 
 /* Must be called with clk disabled, and returns with clk enabled */
-int tegra_powergate_sequence_power_up(int id, struct clk *clk)
+int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                       struct reset_control *rst)
 {
        int ret;
 
-       tegra_periph_reset_assert(clk);
+       reset_control_assert(rst);
 
        ret = tegra_powergate_power_on(id);
        if (ret)
@@ -165,7 +167,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
                goto err_clamp;
 
        udelay(10);
-       tegra_periph_reset_deassert(clk);
+       reset_control_deassert(rst);
 
        return 0;
 
index f629e38..0cbb24b 100644 (file)
@@ -279,7 +279,8 @@ static int gr3d_probe(struct platform_device *pdev)
                }
        }
 
-       err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk);
+       err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk,
+                                               gr3d->rst);
        if (err < 0) {
                dev_err(&pdev->dev, "failed to power up 3D unit\n");
                return err;
@@ -287,7 +288,8 @@ static int gr3d_probe(struct platform_device *pdev)
 
        if (gr3d->clk_secondary) {
                err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D1,
-                                                       gr3d->clk_secondary);
+                                                       gr3d->clk_secondary,
+                                                       gr3d->rst_secondary);
                if (err < 0) {
                        dev_err(&pdev->dev,
                                "failed to power up secondary 3D unit\n");
index 6681c31..0175041 100644 (file)
@@ -955,7 +955,8 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
        }
 
        err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
-                                               pcie->pex_clk);
+                                               pcie->pex_clk,
+                                               pcie->pex_rst);
        if (err) {
                dev_err(pcie->dev, "powerup sequence failed: %d\n", err);
                return err;
index fd44983..afe442d 100644 (file)
@@ -19,6 +19,7 @@
 #define _MACH_TEGRA_POWERGATE_H_
 
 struct clk;
+struct reset_control;
 
 #define TEGRA_POWERGATE_CPU    0
 #define TEGRA_POWERGATE_3D     1
@@ -52,7 +53,8 @@ int tegra_powergate_power_off(int id);
 int tegra_powergate_remove_clamping(int id);
 
 /* Must be called with clk disabled, and returns with clk enabled */
-int tegra_powergate_sequence_power_up(int id, struct clk *clk);
+int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                     struct reset_control *rst);
 #else
 static inline int tegra_powergate_is_powered(int id)
 {
@@ -74,7 +76,8 @@ static inline int tegra_powergate_remove_clamping(int id)
        return -ENOSYS;
 }
 
-static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk)
+static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
+                                                   struct reset_control *rst);
 {
        return -ENOSYS;
 }