arm64: dts: renesas: r9a07g054: Fillup the GPU node

Renesas RZ/V2L SoC has Mali-G31 GPU, this patch fills up the GPU node and
adds opp table to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220308223324.7456-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 9e73017..e4f1def 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -83,6 +83,50 @@
                };
        };
 
+       gpu_opp_table: opp-table-1 {
+               compatible = "operating-points-v2";
+
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-250000000 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-125000000 {
+                       opp-hz = /bits/ 64 <125000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-100000000 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-62500000 {
+                       opp-hz = /bits/ 64 <62500000>;
+                       opp-microvolt = <1100000>;
+               };
+
+               opp-50000000 {
+                       opp-hz = /bits/ 64 <50000000>;
+                       opp-microvolt = <1100000>;
+               };
+       };
+
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2";
                method = "smc";
@@ -606,8 +650,24 @@
                };
 
                gpu: gpu@11840000 {
+                       compatible = "renesas,r9a07g054-mali",
+                                    "arm,mali-bifrost";
                        reg = <0x0 0x11840000 0x0 0x10000>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "job", "mmu", "gpu", "event";
+                       clocks = <&cpg CPG_MOD R9A07G054_GPU_CLK>,
+                                <&cpg CPG_MOD R9A07G054_GPU_AXI_CLK>,
+                                <&cpg CPG_MOD R9A07G054_GPU_ACE_CLK>;
+                       clock-names = "gpu", "bus", "bus_ace";
+                       power-domains = <&cpg>;
+                       resets = <&cpg R9A07G054_GPU_RESETN>,
+                                <&cpg R9A07G054_GPU_AXI_RESETN>,
+                                <&cpg R9A07G054_GPU_ACE_RESETN>;
+                       reset-names = "rst", "axi_rst", "ace_rst";
+                       operating-points-v2 = <&gpu_opp_table>;
                };
 
                gic: interrupt-controller@11900000 {