mips: bmips: dts: add BCM6358 reset controller support
authorÁlvaro Fernández Rojas <noltari@gmail.com>
Wed, 17 Jun 2020 10:50:37 +0000 (12:50 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Tue, 17 Nov 2020 20:52:27 +0000 (21:52 +0100)
BCM6358 SoCs have a reset controller for certain components.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/brcm/bcm6358.dtsi
include/dt-bindings/reset/bcm6358-reset.h [new file with mode: 0644]

index f21176cac0381e6972227222c596cd0f0940544f..9d93e7f5e6fc7ea70c833463ac635f8b00dcb1a2 100644 (file)
                        interrupts = <2>, <3>;
                };
 
+               periph_rst: reset-controller@fffe0034 {
+                       compatible = "brcm,bcm6345-reset";
+                       reg = <0xfffe0034 0x4>;
+                       #reset-cells = <1>;
+               };
+
                leds0: led-controller@fffe00d0 {
                        #address-cells = <1>;
                        #size-cells = <0>;
diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h
new file mode 100644 (file)
index 0000000..bda62ef
--- /dev/null
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6358_H
+#define __DT_BINDINGS_RESET_BCM6358_H
+
+#define BCM6358_RST_SPI                0
+#define BCM6358_RST_ENET       2
+#define BCM6358_RST_MPI                3
+#define BCM6358_RST_EPHY       6
+#define BCM6358_RST_SAR                7
+#define BCM6358_RST_USBH       12
+#define BCM6358_RST_PCM                13
+#define BCM6358_RST_ADSL       14
+
+#endif /* __DT_BINDINGS_RESET_BCM6358_H */