[SCSI] qla4xxx: Use IDC_CTRL bit1 directly instead of AF_83XX_NO_FWDUMP flag.
authorVikas Chaudhary <vikas.chaudhary@qlogic.com>
Mon, 16 Dec 2013 11:49:34 +0000 (06:49 -0500)
committerJames Bottomley <JBottomley@Parallels.com>
Sat, 15 Mar 2014 17:19:12 +0000 (10:19 -0700)
Removed AF_83XX_NO_FWDUMP flag and directly checking IDC_CTRL bit1
while taking minidump, to check for graceful reset.

Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
drivers/scsi/qla4xxx/ql4_83xx.c
drivers/scsi/qla4xxx/ql4_def.h
drivers/scsi/qla4xxx/ql4_nx.c

index c105b6e..2eba353 100644 (file)
@@ -1304,12 +1304,24 @@ static void qla4_83xx_process_init_seq(struct scsi_qla_host *ha)
 static int qla4_83xx_restart(struct scsi_qla_host *ha)
 {
        int ret_val = QLA_SUCCESS;
+       uint32_t idc_ctrl;
 
        qla4_83xx_process_stop_seq(ha);
 
-       /* Collect minidump*/
-       if (!test_and_clear_bit(AF_83XX_NO_FW_DUMP, &ha->flags))
+       /*
+        * Collect minidump.
+        * If IDC_CTRL BIT1 is set, clear it on going to INIT state and
+        * don't collect minidump
+        */
+       idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL);
+       if (idc_ctrl & GRACEFUL_RESET_BIT1) {
+               qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL,
+                                (idc_ctrl & ~GRACEFUL_RESET_BIT1));
+               ql4_printk(KERN_INFO, ha, "%s: Graceful RESET: Not collecting minidump\n",
+                          __func__);
+       } else {
                qla4_8xxx_get_minidump(ha);
+       }
 
        qla4_83xx_process_init_seq(ha);
 
index e9df4ad..5236337 100644 (file)
@@ -580,7 +580,6 @@ struct scsi_qla_host {
 #define AF_82XX_FW_DUMPED              24 /* 0x01000000 */
 #define AF_8XXX_RST_OWNER              25 /* 0x02000000 */
 #define AF_82XX_DUMP_READING           26 /* 0x04000000 */
-#define AF_83XX_NO_FW_DUMP             27 /* 0x08000000 */
 #define AF_83XX_IOCB_INTR_ON           28 /* 0x10000000 */
 #define AF_83XX_MBOX_INTR_ON           29 /* 0x20000000 */
 
index bbe8361..0ec07ec 100644 (file)
@@ -2821,7 +2821,7 @@ int qla4_8xxx_device_bootstrap(struct scsi_qla_host *ha)
 {
        int rval = QLA_ERROR;
        int i, timeout;
-       uint32_t old_count, count, idc_ctrl;
+       uint32_t old_count, count;
        int need_reset = 0, peg_stuck = 1;
 
        need_reset = ha->isp_ops->need_reset(ha);
@@ -2864,19 +2864,6 @@ dev_initialize:
        qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE,
                            QLA8XXX_DEV_INITIALIZING);
 
-       /*
-        * For ISP8324 and ISP8042, if IDC_CTRL GRACEFUL_RESET_BIT1 is set,
-        * reset it after device goes to INIT state.
-        */
-       if (is_qla8032(ha) || is_qla8042(ha)) {
-               idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL);
-               if (idc_ctrl & GRACEFUL_RESET_BIT1) {
-                       qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL,
-                                        (idc_ctrl & ~GRACEFUL_RESET_BIT1));
-                       set_bit(AF_83XX_NO_FW_DUMP, &ha->flags);
-               }
-       }
-
        ha->isp_ops->idc_unlock(ha);
 
        if (is_qla8022(ha))