ath9k: Enable extended synch for AR9485 to fix L0s recovery issue
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Mon, 6 Dec 2010 12:27:42 +0000 (04:27 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 7 Dec 2010 21:34:53 +0000 (16:34 -0500)
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath.h
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h
drivers/net/wireless/ath/ath9k/main.c
drivers/net/wireless/ath/ath9k/pci.c

index c914f52..dd78ad1 100644 (file)
@@ -131,6 +131,7 @@ struct ath_bus_ops {
        void (*read_cachesize)(struct ath_common *common, int *csz);
        bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
        void (*bt_coex_prep)(struct ath_common *common);
+       void (*extn_synch_en)(struct ath_common *common);
 };
 
 struct ath_common {
index 66b4a2a..49da184 100644 (file)
@@ -1971,6 +1971,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
 
 
 
+       if (AR_SREV_9485_10(ah)) {
+               pCap->pcie_lcr_extsync_en = true;
+               pCap->pcie_lcr_offset = 0x80;
+       }
+
        return 0;
 }
 
index 0649ae6..76ae329 100644 (file)
@@ -209,6 +209,8 @@ struct ath9k_hw_capabilities {
        u8 rx_status_len;
        u8 tx_desc_len;
        u8 txs_len;
+       u16 pcie_lcr_offset;
+       bool pcie_lcr_extsync_en;
 };
 
 struct ath9k_ops_config {
index a59cfce..3e0c8a1 100644 (file)
@@ -1179,6 +1179,9 @@ static int ath9k_start(struct ieee80211_hw *hw)
 
        pm_qos_update_request(&sc->pm_qos_req, 55);
 
+       if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
+               common->bus_ops->extn_synch_en(common);
+
 mutex_unlock:
        mutex_unlock(&sc->mutex);
 
index 71339da..38d2221 100644 (file)
@@ -103,11 +103,23 @@ static void ath_pci_bt_coex_prep(struct ath_common *common)
        pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
 }
 
+static void ath_pci_extn_synch_enable(struct ath_common *common)
+{
+       struct ath_softc *sc = (struct ath_softc *) common->priv;
+       struct pci_dev *pdev = to_pci_dev(sc->dev);
+       u8 lnkctl;
+
+       pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
+       lnkctl |= PCI_EXP_LNKCTL_ES;
+       pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
+}
+
 static const struct ath_bus_ops ath_pci_bus_ops = {
        .ath_bus_type = ATH_PCI,
        .read_cachesize = ath_pci_read_cachesize,
        .eeprom_read = ath_pci_eeprom_read,
        .bt_coex_prep = ath_pci_bt_coex_prep,
+       .extn_synch_en = ath_pci_extn_synch_enable,
 };
 
 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)