drm amdgpu: SI UVD context rreg/wreg
authorSonny Jiang <sonny.jiang@amd.com>
Wed, 10 Jun 2020 20:14:57 +0000 (16:14 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:24 +0000 (01:59 -0400)
Implement SI uvd_ctx_rreg/wreg functions.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si.c

index dfbf426..0f1c6c1 100644 (file)
@@ -974,6 +974,28 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
        spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
 }
 
+static u32 si_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
+{
+       unsigned long flags;
+       u32 r;
+
+       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
+       r = RREG32(mmUVD_CTX_DATA);
+       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+       return r;
+}
+
+static void si_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&adev->uvd_ctx_idx_lock, flags);
+       WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));
+       WREG32(mmUVD_CTX_DATA, (v));
+       spin_unlock_irqrestore(&adev->uvd_ctx_idx_lock, flags);
+}
+
 static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
        {GRBM_STATUS},
        {mmGRBM_STATUS2},
@@ -1444,8 +1466,8 @@ static int si_common_early_init(void *handle)
        adev->pcie_wreg = &si_pcie_wreg;
        adev->pciep_rreg = &si_pciep_rreg;
        adev->pciep_wreg = &si_pciep_wreg;
-       adev->uvd_ctx_rreg = NULL;
-       adev->uvd_ctx_wreg = NULL;
+       adev->uvd_ctx_rreg = si_uvd_ctx_rreg;
+       adev->uvd_ctx_wreg = si_uvd_ctx_wreg;
        adev->didt_rreg = NULL;
        adev->didt_wreg = NULL;