drm/bridge: ti-sn65dsi83: Allow GPIO operations to sleep
authorAlexander Stein <alexander.stein@ew.tq-group.com>
Tue, 14 Jun 2022 09:58:35 +0000 (11:58 +0200)
committerRobert Foss <robert.foss@linaro.org>
Mon, 20 Jun 2022 20:00:32 +0000 (22:00 +0200)
There is no need to require non-sleeping GPIO access. Silence the
WARN_ON() if GPIO is using e.g. I2C expanders.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220614095835.1398708-2-alexander.stein@ew.tq-group.com
Reviewed-by: Robert Foss <robert.foss@linaro.org>
drivers/gpu/drm/bridge/ti-sn65dsi83.c

index a306150..dc26640 100644 (file)
@@ -344,7 +344,7 @@ static void sn65dsi83_atomic_enable(struct drm_bridge *bridge,
        }
 
        /* Deassert reset */
-       gpiod_set_value(ctx->enable_gpio, 1);
+       gpiod_set_value_cansleep(ctx->enable_gpio, 1);
        usleep_range(1000, 1100);
 
        /* Get the LVDS format from the bridge state. */
@@ -500,7 +500,7 @@ static void sn65dsi83_atomic_disable(struct drm_bridge *bridge,
        int ret;
 
        /* Put the chip in reset, pull EN line low, and assure 10ms reset low timing. */
-       gpiod_set_value(ctx->enable_gpio, 0);
+       gpiod_set_value_cansleep(ctx->enable_gpio, 0);
        usleep_range(10000, 11000);
 
        ret = regulator_disable(ctx->vcc);