k3: pmic: Clear ESM masks

ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.

If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.

Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>

diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c
index a195dc5..b971f32 100644 (file)
--- a/drivers/misc/esm_pmic.c
+++ b/drivers/misc/esm_pmic.c
@@ -26,6 +26,9 @@
 #define ESM_MCU_EN             BIT(6)
 #define ESM_MCU_ENDRV          BIT(5)
 
+#define ESM_MCU_MASK_REG       0x59
+#define ESM_MCU_MASK           0x7
+
 /**
  * pmic_esm_probe: configures and enables PMIC ESM functionality
  *
@@ -48,6 +51,12 @@ static int pmic_esm_probe(struct udevice *dev)
                return ret;
        }
 
+       ret = pmic_reg_write(dev->parent, ESM_MCU_MASK_REG, ESM_MCU_MASK);
+       if (ret) {
+               dev_err(dev, "clearing ESM masks failed: %d\n", ret);
+               return ret;
+       }
+
        ret = pmic_reg_write(dev->parent, ESM_MCU_START_REG, ESM_MCU_START);
        if (ret) {
                dev_err(dev, "starting ESM failed: %d\n", ret);