rtlwifi: 8192de: use le32 to access cckswing tables
authorPing-Ke Shih <pkshih@realtek.com>
Fri, 10 May 2019 08:03:33 +0000 (16:03 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 28 May 2019 12:34:01 +0000 (15:34 +0300)
The cckswing tables cckswing_table_ch1ch13 and cckswing_table_ch14 are
u8 array in little-endian order. To compare four u8 value with register
u32 value, cast the value to cpu order.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.c

index df02cb6..71f3b6b 100644 (file)
@@ -680,6 +680,7 @@ static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
        int i;
        unsigned long flag = 0;
        long temp_cck;
+       const u8 *cckswing;
 
        /* Query CCK default setting From 0xa24 */
        rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
@@ -687,28 +688,19 @@ static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
                                 MASKDWORD) & MASKCCK;
        rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
        for (i = 0; i < CCK_TABLE_LENGTH; i++) {
-               if (rtlpriv->dm.cck_inch14) {
-                       if (!memcmp((void *)&temp_cck,
-                           (void *)&cckswing_table_ch14[i][2], 4)) {
-                               *cck_index_old = (u8) i;
-                               RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                        "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
-                                        RCCK0_TXFILTER2, temp_cck,
-                                        *cck_index_old,
-                                        rtlpriv->dm.cck_inch14);
-                               break;
-                       }
-               } else {
-                       if (!memcmp((void *) &temp_cck,
-                           &cckswing_table_ch1ch13[i][2], 4)) {
-                               *cck_index_old = (u8) i;
-                               RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
-                                        "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
-                                        RCCK0_TXFILTER2, temp_cck,
-                                        *cck_index_old,
-                                        rtlpriv->dm.cck_inch14);
-                               break;
-                       }
+               if (rtlpriv->dm.cck_inch14)
+                       cckswing = &cckswing_table_ch14[i][2];
+               else
+                       cckswing = &cckswing_table_ch1ch13[i][2];
+
+               if (temp_cck == le32_to_cpu(*((__le32 *)cckswing))) {
+                       *cck_index_old = (u8)i;
+                       RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
+                                "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
+                                RCCK0_TXFILTER2, temp_cck,
+                                *cck_index_old,
+                                rtlpriv->dm.cck_inch14);
+                       break;
                }
        }
        *temp_cckg = temp_cck;