qemu_irq irq_kbd;
qemu_irq irq_mouse;
target_phys_addr_t base;
+ int it_shift;
} KBDState;
KBDState kbd_state;
{
KBDState *s = opaque;
- if (addr == s->base)
- return kbd_read_data(s, 0);
- else
- return kbd_read_status(s, 0);
+ switch ((addr - s->base) >> s->it_shift) {
+ case 0:
+ return kbd_read_data(s, 0) & 0xff;
+ case 1:
+ return kbd_read_status(s, 0) & 0xff;
+ default:
+ return 0xff;
+ }
}
-void kbd_mm_writeb (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
{
KBDState *s = opaque;
- if (addr == s->base)
- kbd_write_data(s, 0, value);
- else
- kbd_write_command(s, 0, value);
+ switch ((addr - s->base) >> s->it_shift) {
+ case 0:
+ kbd_write_data(s, 0, value & 0xff);
+ break;
+ case 1:
+ kbd_write_command(s, 0, value & 0xff);
+ break;
+ }
}
static CPUReadMemoryFunc *kbd_mm_read[] = {
&kbd_mm_writeb,
};
-void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_ulong base, int it_shift)
+void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_ulong base,
+ int it_shift)
{
KBDState *s = &kbd_state;
int s_io_memory;
s->irq_kbd = kbd_irq;
s->irq_mouse = mouse_irq;
s->base = base;
+ s->it_shift = it_shift;
kbd_reset(s);
register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
- cpu_register_physical_memory(base & ~(TARGET_PAGE_SIZE - 1), TARGET_PAGE_SIZE, s_io_memory);
+ cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);