arm64: dts: ti: k3-am642-evm: Add pwm nodes
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 21 Jul 2021 11:36:24 +0000 (17:06 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 30 Jul 2021 15:44:42 +0000 (10:44 -0500)
ecap0 can be configured to use pad ECAP0_IN_APWM_OUT (D18) which has a
signal connected to Pin 1 of J12 on EVM. Add support for adding this
pinmux so that pwm can be observed on pin 1 of Header J12

Also mark all un-used epwm and ecap pwm nodes as disabled.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210721113625.17299-4-lokeshvutla@ti.com
arch/arm64/boot/dts/ti/k3-am642-evm.dts

index 0307122..24ce494 100644 (file)
                        AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
                >;
        };
+
+       main_ecap0_pins_default: main-ecap0-pins-default {
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
+               >;
+       };
 };
 
 &main_uart0 {
        num-lanes = <1>;
        status = "disabled";
 };
+
+&ecap0 {
+       /* PWM is available on Pin 1 of header J12 */
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_ecap0_pins_default>;
+};
+
+&ecap1 {
+       status = "disabled";
+};
+
+&ecap2 {
+       status = "disabled";
+};
+
+&epwm0 {
+       status = "disabled";
+};
+
+&epwm1 {
+       status = "disabled";
+};
+
+&epwm2 {
+       status = "disabled";
+};
+
+&epwm3 {
+       status = "disabled";
+};
+
+&epwm4 {
+       status = "disabled";
+};
+
+&epwm5 {
+       status = "disabled";
+};
+
+&epwm6 {
+       status = "disabled";
+};
+
+&epwm7 {
+       status = "disabled";
+};
+
+&epwm8 {
+       status = "disabled";
+};