drm/i915: Perform an invalidate prior to executing golden renderstate
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 8 Aug 2017 13:19:04 +0000 (14:19 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 8 Aug 2017 13:53:50 +0000 (14:53 +0100)
As we may have just bound the renderstate into the GGTT for execution, we
need to ensure that the GTT TLB are also flushed.

On snb-gt2, this would cause a random GPU hang at the start of a new
context (e.g. boot) and on snb-gt1, it was causing the renderstate batch
to take ~10s. It was the GPU hang that revealed the truth, as the CS
gleefully executed beyond the end of the golden renderstate batch, a good
indicator for a GTT TLB miss.

Fixes: 20fe17aa52dc ("drm/i915: Remove redundant TLB invalidate on switching contexts")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: stable@vger.kernel.org
Link: https://patchwork.freedesktop.org/patch/msgid/20170808131904.1385-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.12-rc1+
drivers/gpu/drm/i915/i915_gem_render_state.c

index 7032c54..4dd4c21 100644 (file)
@@ -242,6 +242,10 @@ int i915_gem_render_state_emit(struct drm_i915_gem_request *req)
                        goto err_unpin;
        }
 
+       ret = req->engine->emit_flush(req, EMIT_INVALIDATE);
+       if (ret)
+               goto err_unpin;
+
        ret = req->engine->emit_bb_start(req,
                                         so->batch_offset, so->batch_size,
                                         I915_DISPATCH_SECURE);