ath10k: Get rid of "per_ce_irq" hw param

As of the patch ("ath10k: Keep track of which interrupts fired, don't
poll them") we now have no users of this hardware parameter.  Remove
it.

Suggested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200709082024.v2.2.I083faa4e62e69f863311c89ae5eb28ec5a229b70@changeid

diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 92e9069..5f4e121 100644 (file)
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -119,7 +119,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -155,7 +154,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -220,7 +218,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -255,7 +252,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -290,7 +286,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -328,7 +323,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -370,7 +364,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -418,7 +411,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -463,7 +455,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -498,7 +489,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -535,7 +525,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -604,7 +593,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .target_64bit = false,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
-               .per_ce_irq = false,
                .shadow_reg_support = false,
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
@@ -632,7 +620,6 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
                .target_64bit = true,
                .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
-               .per_ce_irq = true,
                .shadow_reg_support = true,
                .rri_on_ddr = true,
                .hw_filter_reset_required = false,

diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index f16edcb..c6ded21 100644 (file)
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -593,9 +593,6 @@ struct ath10k_hw_params {
        /* Target rx ring fill level */
        u32 rx_ring_fill_level;
 
-       /* target supporting per ce IRQ */
-       bool per_ce_irq;
-
        /* target supporting shadow register for ce write */
        bool shadow_reg_support;