Merge pull request #15948 from fiigii/fix-ifdef

Fix a minor bug

diff --combined src/jit/compiler.h
index e92768f,dd11231..c59a397
--- 1/src/jit/compiler.h
--- 2/src/jit/compiler.h
+++ b/src/jit/compiler.h
@@@ -2056,7 -2056,7 +2056,7 @@@ public
      void SetOpLclRelatedToSIMDIntrinsic(GenTreePtr op);
  #endif
  
 -#if FEATURE_HW_INTRINSICS
 +#ifdef FEATURE_HW_INTRINSICS
      GenTreeHWIntrinsic* gtNewSimdHWIntrinsicNode(var_types      type,
                                                   NamedIntrinsic hwIntrinsicID,
                                                   var_types      baseType,
@@@ -3041,7 -3041,7 +3041,7 @@@ protected
                                bool                  tailCall);
      NamedIntrinsic lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method);
  
 -#if FEATURE_HW_INTRINSICS
 +#ifdef FEATURE_HW_INTRINSICS
      static InstructionSet lookupHWIntrinsicISA(const char* className);
      static NamedIntrinsic lookupHWIntrinsic(const char* methodName, InstructionSet isa);
      static InstructionSet isaOfHWIntrinsic(NamedIntrinsic intrinsic);
@@@ -7479,7 -7479,7 +7479,7 @@@ private
      CORINFO_CLASS_HANDLE SIMDVector4Handle;
      CORINFO_CLASS_HANDLE SIMDVectorHandle;
  
 -#if FEATURE_HW_INTRINSICS
 +#ifdef FEATURE_HW_INTRINSICS
  #if defined(_TARGET_ARM64_)
      CORINFO_CLASS_HANDLE Vector64FloatHandle;
      CORINFO_CLASS_HANDLE Vector64DoubleHandle;
@@@ -7830,7 -7830,7 +7830,7 @@@
      // AVX2: 32-byte Vector<T> and Vector256<T>
      unsigned int maxSIMDStructBytes()
      {
 -#if FEATURE_HW_INTRINSICS && defined(_TARGET_XARCH_)
 +#if defined(FEATURE_HW_INTRINSICS) && defined(_TARGET_XARCH_)
          if (compSupports(InstructionSet_AVX))
          {
              return YMM_REGSIZE_BYTES;
@@@ -7979,7 -7979,7 +7979,7 @@@ private
  
      bool compSupports(InstructionSet isa) const
      {
- #if defined(_TARGET_XARCH_) | defined(_TARGET_ARM64_)
+ #if defined(_TARGET_XARCH_) || defined(_TARGET_ARM64_)
          return (opts.compSupportsISA & (1ULL << isa)) != 0;
  #else
          return false;
@@@ -8105,7 -8105,7 +8105,7 @@@ public
          bool compCanUseSSE4; // Allow CodeGen to use SSE3, SSSE3, SSE4.1 and SSE4.2 instructions
  #endif                       // _TARGET_XARCH_
  
- #if defined(_TARGET_XARCH_) | defined(_TARGET_ARM64_)
+ #if defined(_TARGET_XARCH_) || defined(_TARGET_ARM64_)
          uint64_t compSupportsISA;
          void setSupportedISA(InstructionSet isa)
          {