arm64: dts: mediatek: mt8192: fix i2c node names
authorFabien Parent <fparent@baylibre.com>
Wed, 10 Nov 2021 19:49:59 +0000 (20:49 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Wed, 17 Nov 2021 17:08:34 +0000 (18:08 +0100)
Fix the i2c node names to be compliant to the YAML schema. The
I2C node name should match the following pattern: "^i2c@[0-9a-f]+$".

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20211110194959.20611-4-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8192.dtsi

index c7c7d4e..53d790c 100644 (file)
                        #clock-cells = <1>;
                };
 
-               i2c3: i2c3@11cb0000 {
+               i2c3: i2c@11cb0000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11cb0000 0 0x1000>,
                              <0 0x10217300 0 0x80>;
                        #clock-cells = <1>;
                };
 
-               i2c7: i2c7@11d00000 {
+               i2c7: i2c@11d00000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d00000 0 0x1000>,
                              <0 0x10217600 0 0x180>;
                        status = "disabled";
                };
 
-               i2c8: i2c8@11d01000 {
+               i2c8: i2c@11d01000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d01000 0 0x1000>,
                              <0 0x10217780 0 0x180>;
                        status = "disabled";
                };
 
-               i2c9: i2c9@11d02000 {
+               i2c9: i2c@11d02000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d02000 0 0x1000>,
                              <0 0x10217900 0 0x180>;
                        #clock-cells = <1>;
                };
 
-               i2c1: i2c1@11d20000 {
+               i2c1: i2c@11d20000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d20000 0 0x1000>,
                              <0 0x10217100 0 0x80>;
                        status = "disabled";
                };
 
-               i2c2: i2c2@11d21000 {
+               i2c2: i2c@11d21000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d21000 0 0x1000>,
                              <0 0x10217180 0 0x180>;
                        status = "disabled";
                };
 
-               i2c4: i2c4@11d22000 {
+               i2c4: i2c@11d22000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11d22000 0 0x1000>,
                              <0 0x10217380 0 0x180>;
                        #clock-cells = <1>;
                };
 
-               i2c5: i2c5@11e00000 {
+               i2c5: i2c@11e00000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11e00000 0 0x1000>,
                              <0 0x10217500 0 0x80>;
                        #clock-cells = <1>;
                };
 
-               i2c0: i2c0@11f00000 {
+               i2c0: i2c@11f00000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11f00000 0 0x1000>,
                              <0 0x10217080 0 0x80>;
                        status = "disabled";
                };
 
-               i2c6: i2c6@11f01000 {
+               i2c6: i2c@11f01000 {
                        compatible = "mediatek,mt8192-i2c";
                        reg = <0 0x11f01000 0 0x1000>,
                              <0 0x10217580 0 0x80>;