Merge tag 'v3.12' into drm-intel-next

I want to merge in the new Broadwell support as a late hw enabling
pull request. But since the internal branch was based upon our
drm-intel-nightly integration branch I need to resolve all the
oustanding conflicts in drm/i915 with a backmerge to make the 60+
patches apply properly.

We'll propably have some fun because Linus will come up with a
slightly different merge solution.

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/i915_drv.c
	drivers/gpu/drm/i915/intel_crt.c
	drivers/gpu/drm/i915/intel_ddi.c
	drivers/gpu/drm/i915/intel_display.c
	drivers/gpu/drm/i915/intel_dp.c
	drivers/gpu/drm/i915/intel_drv.h

All rather simple adjacent lines changed or partial backports from
-next to -fixes, with the exception of the thaw code in i915_dma.c.
That one needed a bit of shuffling to restore the intent.

Oh and the massive header file reordering in intel_drv.h is a bit
trouble. But not much.

v2: Also don't forget the fixup for the silent conflict that results
in compile fail ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --cc drivers/gpu/drm/drm_drv.c
Simple merge

diff --cc drivers/gpu/drm/drm_fb_helper.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_dma.c
index 6eecce7,d5c784d..0cab2d0
--- 1/drivers/gpu/drm/i915/i915_dma.c
--- 2/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1314,11 -1311,6 +1311,8 @@@ static int i915_load_modeset_init(struc
        if (ret)
                goto cleanup_gem_stolen;
  
-       /* Keep VGA alive until i915_disable_vga_mem() */
-       intel_display_power_get(dev, POWER_DOMAIN_VGA);
- 
 +      intel_power_domains_init_hw(dev);
 +
        /* Important: The output setup functions called by modeset_init need
         * working irqs for e.g. gmbus and dp aux transfers. */
        intel_modeset_init(dev);

diff --cc drivers/gpu/drm/i915/i915_drv.c
index 1041644,2ad2788..a0804fa
--- 1/drivers/gpu/drm/i915/i915_drv.c
--- 2/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@@ -656,7 -642,20 +658,10 @@@ static int __i915_drm_thaw(struct drm_d
  
  static int i915_drm_thaw(struct drm_device *dev)
  {
 -      int error = 0;
 -
 -      intel_uncore_sanitize(dev);
 -
 -      if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 -              mutex_lock(&dev->struct_mutex);
 -              i915_gem_restore_gtt_mappings(dev);
 -              mutex_unlock(&dev->struct_mutex);
 -      } else if (drm_core_check_feature(dev, DRIVER_MODESET))
++      if (drm_core_check_feature(dev, DRIVER_MODESET))
+               i915_check_and_clear_faults(dev);
+ 
 -      __i915_drm_thaw(dev);
 -
 -      return error;
 +      return __i915_drm_thaw(dev, true);
  }
  
  int i915_resume(struct drm_device *dev)

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem_gtt.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_reg.h
Simple merge

diff --cc drivers/gpu/drm/i915/intel_display.c
index 40a8f59,d78d33f..f34252d
--- 1/drivers/gpu/drm/i915/intel_display.c
--- 2/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -10498,36 -10082,9 +10495,9 @@@ static void i915_disable_vga(struct drm
        POSTING_READ(vga_reg);
  }
  
- static void i915_enable_vga_mem(struct drm_device *dev)
- {
-       /* Enable VGA memory on Intel HD */
-       if (HAS_PCH_SPLIT(dev)) {
-               vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
-               outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
-               vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
-                                                  VGA_RSRC_LEGACY_MEM |
-                                                  VGA_RSRC_NORMAL_IO |
-                                                  VGA_RSRC_NORMAL_MEM);
-               vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
-       }
- }
- 
- void i915_disable_vga_mem(struct drm_device *dev)
- {
-       /* Disable VGA memory on Intel HD */
-       if (HAS_PCH_SPLIT(dev)) {
-               vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
-               outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
-               vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
-                                                  VGA_RSRC_NORMAL_IO |
-                                                  VGA_RSRC_NORMAL_MEM);
-               vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
-       }
- }
- 
  void intel_modeset_init_hw(struct drm_device *dev)
  {
 -      intel_init_power_well(dev);
 +      struct drm_i915_private *dev_priv = dev->dev_private;
  
        intel_prepare_ddi(dev);
  
@@@ -10807,10 -10357,9 +10777,9 @@@ void i915_redisable_vga(struct drm_devi
            (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0)
                return;
  
 -      if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
 +      if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
                DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
                i915_disable_vga(dev);
-               i915_disable_vga_mem(dev);
        }
  }
  

diff --cc drivers/gpu/drm/i915/intel_dp.c
index 6835777,1a43137..7619eae
--- 1/drivers/gpu/drm/i915/intel_dp.c
--- 2/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1477,20 -1402,31 +1477,40 @@@ static void intel_dp_get_config(struct 
                        pipe_config->port_clock = 270000;
        }
  
 +      dotclock = intel_dotclock_calculate(pipe_config->port_clock,
 +                                          &pipe_config->dp_m_n);
 +
 +      if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A)
 +              ironlake_check_encoder_dotclock(pipe_config, dotclock);
 +
 +      pipe_config->adjusted_mode.crtc_clock = dotclock;
++
+       if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp &&
+           pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {
+               /*
+                * This is a big fat ugly hack.
+                *
+                * Some machines in UEFI boot mode provide us a VBT that has 18
+                * bpp and 1.62 GHz link bandwidth for eDP, which for reasons
+                * unknown we fail to light up. Yet the same BIOS boots up with
+                * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as
+                * max, not what it tells us to use.
+                *
+                * Note: This will still be broken if the eDP panel is not lit
+                * up by the BIOS, and thus we can't get the mode at module
+                * load.
+                */
+               DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n",
+                             pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp);
+               dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp;
+       }
  }
  
 -static bool is_edp_psr(struct intel_dp *intel_dp)
 +static bool is_edp_psr(struct drm_device *dev)
  {
 -      return is_edp(intel_dp) &&
 -              intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
 +      struct drm_i915_private *dev_priv = dev->dev_private;
 +
 +      return dev_priv->psr.sink_support;
  }
  
  static bool intel_edp_is_psr_enabled(struct drm_device *dev)
@@@ -1550,8 -1486,8 +1570,8 @@@ static void intel_edp_psr_setup(struct 
        intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
        /* Avoid continuous PSR exit by masking memup and hpd */
 -      I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
 +      I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
-                  EDP_PSR_DEBUG_MASK_HPD);
+                  EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
        intel_dp->psr_setup_done = true;
  }

diff --cc drivers/gpu/drm/i915/intel_lvds.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_pm.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_drv.c
Simple merge

diff --cc include/uapi/drm/drm_mode.h
Simple merge