net/mlx5: Add host params change event
authorBodong Wang <bodong@mellanox.com>
Wed, 13 Feb 2019 06:55:38 +0000 (22:55 -0800)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 14 Feb 2019 20:14:42 +0000 (12:14 -0800)
In Embedded CPU (EC) configurations, the EC driver needs to know when
the number of virtual functions change on the corresponding PF at the
host side. This is required so the EC driver can create or destroy
representor net devices that represent the VFs ports.

Whenever a change in the number of VFs occurs, firmware will generate an
event towards the EC which will trigger a work to complete the rest of
the handling. The specifics of the handling will be introduced in a
downstream patch.

Signed-off-by: Bodong Wang <bodong@mellanox.com>
Signed-off-by: Eli Cohen <eli@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/eq.c
drivers/net/ethernet/mellanox/mlx5/core/events.c
include/linux/mlx5/device.h
include/linux/mlx5/driver.h

index 7092457705a2463ef53c55b28aaca9fe770990ba..5c02f929179998f8179f89e85aa0c80538729364 100644 (file)
@@ -530,6 +530,9 @@ static u64 gather_async_events_mask(struct mlx5_core_dev *dev)
        if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters))
                async_event_mask |= (1ull << MLX5_EVENT_TYPE_MONITOR_COUNTER);
 
+       if (mlx5_core_is_ecpf_esw_manager(dev))
+               async_event_mask |= (1ull << MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE);
+
        return async_event_mask;
 }
 
index fbc42b7252a9129dda4ce44e9eefe26c1273a778..4f7f776d63329c8adc8ac6714c458ea5d634affb 100644 (file)
@@ -103,6 +103,8 @@ static const char *eqe_type_str(u8 type)
                return "MLX5_EVENT_TYPE_STALL_EVENT";
        case MLX5_EVENT_TYPE_CMD:
                return "MLX5_EVENT_TYPE_CMD";
+       case MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE:
+               return "MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE";
        case MLX5_EVENT_TYPE_PAGE_REQUEST:
                return "MLX5_EVENT_TYPE_PAGE_REQUEST";
        case MLX5_EVENT_TYPE_PAGE_FAULT:
index f2070350f60a96179c34b7295c773e81d4ea7206..f93a5598b942ff4eddb8dcebb218b8a77d0d7332 100644 (file)
@@ -342,6 +342,8 @@ enum mlx5_event {
        MLX5_EVENT_TYPE_PAGE_FAULT         = 0xc,
        MLX5_EVENT_TYPE_NIC_VPORT_CHANGE   = 0xd,
 
+       MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE = 0xe,
+
        MLX5_EVENT_TYPE_DCT_DRAINED        = 0x1c,
 
        MLX5_EVENT_TYPE_FPGA_ERROR         = 0x20,
index cce4e8293384a0ecc705c1507483b4b986cd5159..151563a12fc2ef846c29f8d6fe4d0b18c23dd353 100644 (file)
@@ -1083,6 +1083,11 @@ static inline bool mlx5_core_is_ecpf(struct mlx5_core_dev *dev)
        return dev->caps.embedded_cpu;
 }
 
+static inline bool mlx5_core_is_ecpf_esw_manager(struct mlx5_core_dev *dev)
+{
+       return dev->caps.embedded_cpu && MLX5_CAP_GEN(dev, eswitch_manager);
+}
+
 #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs((mdev)->pdev))
 #define MLX5_VPORT_MANAGER(mdev) \
        (MLX5_CAP_GEN(mdev, vport_group_manager) && \