drm/amdgpu: set ih soft ring enabled flag for vega and navi

software ih ring is enabled in vega10 and navi
ih block by default.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index 580a325..04cc41b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -370,6 +370,9 @@ static int navi10_ih_irq_init(struct amdgpu_device *adev)
        /* enable wptr force update for self int */
        force_update_wptr_for_self_int(adev, 0, 8, true);
 
+       if (adev->irq.ih_soft.ring_size)
+               adev->irq.ih_soft.enabled = true;
+
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index b1d9442..1581113 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -307,6 +307,9 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
        if (ret)
                return ret;
 
+       if (adev->irq.ih_soft.ring_size)
+               adev->irq.ih_soft.enabled = true;
+
        return 0;
 }