vc4_hdmi_regs: Make interrupt mask variant specific
authorDom Cobley <popcornmix@gmail.com>
Thu, 7 May 2020 17:16:08 +0000 (18:16 +0100)
committerpopcornmix <popcornmix@gmail.com>
Wed, 1 Jul 2020 15:33:58 +0000 (16:33 +0100)
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
drivers/gpu/drm/vc4/vc4_hdmi.c
drivers/gpu/drm/vc4/vc4_hdmi.h
drivers/gpu/drm/vc4/vc4_regs.h

index c2d46b0..bfd29c3 100644 (file)
@@ -1285,7 +1285,7 @@ static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
        u32 stat = HDMI_READ(HDMI_CEC_CPU_STATUS);
        u32 cntrl1, cntrl5;
 
-       if (!(stat & VC4_HDMI_CPU_CEC))
+       if (!(stat & vc4_hdmi->variant->cec_mask))
                return IRQ_NONE;
        vc4_hdmi->cec_rx_msg.len = 0;
        cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
@@ -1301,7 +1301,7 @@ static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
                cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
        }
        HDMI_WRITE(HDMI_CEC_CNTRL_1, cntrl1);
-       HDMI_WRITE(HDMI_CEC_CPU_CLEAR, VC4_HDMI_CPU_CEC);
+       HDMI_WRITE(HDMI_CEC_CPU_CLEAR, vc4_hdmi->variant->cec_mask);
 
        return IRQ_WAKE_THREAD;
 }
@@ -1340,9 +1340,9 @@ static int vc4_hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
                         ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
                         ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
 
-               HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
+               HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, vc4_hdmi->variant->cec_mask);
        } else {
-               HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
+               HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, vc4_hdmi->variant->cec_mask);
                HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
                           VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
        }
@@ -1784,6 +1784,8 @@ static const struct vc4_hdmi_variant bcm2835_variant = {
        .get_hsm_clock          = vc4_hdmi_get_hsm_clock,
        .calc_hsm_clock         = vc4_hdmi_calc_hsm_clock,
        .channel_map            = vc4_hdmi_channel_map,
+
+       .cec_mask = VC4_HDMI_CPU_CEC,
 };
 
 static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = {
@@ -1809,6 +1811,8 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = {
        .get_hsm_clock          = vc5_hdmi_get_hsm_clock,
        .calc_hsm_clock         = vc5_hdmi_calc_hsm_clock,
        .channel_map            = vc5_hdmi_channel_map,
+
+       .cec_mask = VC5_HDMI0_CPU_CEC_RX | VC5_HDMI0_CPU_CEC_TX,
 };
 
 static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
@@ -1834,6 +1838,8 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
        .get_hsm_clock          = vc5_hdmi_get_hsm_clock,
        .calc_hsm_clock         = vc5_hdmi_calc_hsm_clock,
        .channel_map            = vc5_hdmi_channel_map,
+
+       .cec_mask = VC5_HDMI1_CPU_CEC_RX | VC5_HDMI1_CPU_CEC_TX,
 };
 
 static const struct of_device_id vc4_hdmi_dt_match[] = {
index 7202454..7765b9c 100644 (file)
@@ -97,6 +97,9 @@ struct vc4_hdmi_variant {
 
        /* Callback to get channel map */
        u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
+
+       /* Bitmask for CEC events */
+       u32 cec_mask;
 };
 
 /* HDMI audio information */
index 7880986..4d01757 100644 (file)
 # define VC4_HDMI_CPU_CEC                      BIT(6)
 # define VC4_HDMI_CPU_HOTPLUG                  BIT(0)
 
+# define VC5_HDMI0_CPU_CEC_RX                  BIT(1)
+# define VC5_HDMI0_CPU_CEC_TX                  BIT(0)
+# define VC5_HDMI0_CPU_HOTPLUG_CONN            BIT(4)
+# define VC5_HDMI0_CPU_HOTPLUG_REM             BIT(5)
+# define VC5_HDMI1_CPU_CEC_RX                  BIT(7)
+# define VC5_HDMI1_CPU_CEC_TX                  BIT(6)
+# define VC5_HDMI1_CPU_HOTPLUG_CONN            BIT(10)
+# define VC5_HDMI1_CPU_HOTPLUG_REM             BIT(11)
+
 /* Debug: Current receive value on the CEC pad. */
 # define VC4_HD_CECRXD                         BIT(9)
 /* Debug: Override CEC output to 0. */