const uint32_t
g_gpr_regnums_i386[] =
{
- gpr_eax_i386,
- gpr_ebx_i386,
- gpr_ecx_i386,
- gpr_edx_i386,
- gpr_edi_i386,
- gpr_esi_i386,
- gpr_ebp_i386,
- gpr_esp_i386,
- gpr_eip_i386,
- gpr_eflags_i386,
- gpr_cs_i386,
- gpr_fs_i386,
- gpr_gs_i386,
- gpr_ss_i386,
- gpr_ds_i386,
- gpr_es_i386,
- gpr_ax_i386,
- gpr_bx_i386,
- gpr_cx_i386,
- gpr_dx_i386,
- gpr_di_i386,
- gpr_si_i386,
- gpr_bp_i386,
- gpr_sp_i386,
- gpr_ah_i386,
- gpr_bh_i386,
- gpr_ch_i386,
- gpr_dh_i386,
- gpr_al_i386,
- gpr_bl_i386,
- gpr_cl_i386,
- gpr_dl_i386,
+ lldb_eax_i386,
+ lldb_ebx_i386,
+ lldb_ecx_i386,
+ lldb_edx_i386,
+ lldb_edi_i386,
+ lldb_esi_i386,
+ lldb_ebp_i386,
+ lldb_esp_i386,
+ lldb_eip_i386,
+ lldb_eflags_i386,
+ lldb_cs_i386,
+ lldb_fs_i386,
+ lldb_gs_i386,
+ lldb_ss_i386,
+ lldb_ds_i386,
+ lldb_es_i386,
+ lldb_ax_i386,
+ lldb_bx_i386,
+ lldb_cx_i386,
+ lldb_dx_i386,
+ lldb_di_i386,
+ lldb_si_i386,
+ lldb_bp_i386,
+ lldb_sp_i386,
+ lldb_ah_i386,
+ lldb_bh_i386,
+ lldb_ch_i386,
+ lldb_dh_i386,
+ lldb_al_i386,
+ lldb_bl_i386,
+ lldb_cl_i386,
+ lldb_dl_i386,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 1 == k_num_gpr_registers_i386,
const uint32_t
g_fpu_regnums_i386[] =
{
- fpu_fctrl_i386,
- fpu_fstat_i386,
- fpu_ftag_i386,
- fpu_fop_i386,
- fpu_fiseg_i386,
- fpu_fioff_i386,
- fpu_foseg_i386,
- fpu_fooff_i386,
- fpu_mxcsr_i386,
- fpu_mxcsrmask_i386,
- fpu_st0_i386,
- fpu_st1_i386,
- fpu_st2_i386,
- fpu_st3_i386,
- fpu_st4_i386,
- fpu_st5_i386,
- fpu_st6_i386,
- fpu_st7_i386,
- fpu_mm0_i386,
- fpu_mm1_i386,
- fpu_mm2_i386,
- fpu_mm3_i386,
- fpu_mm4_i386,
- fpu_mm5_i386,
- fpu_mm6_i386,
- fpu_mm7_i386,
- fpu_xmm0_i386,
- fpu_xmm1_i386,
- fpu_xmm2_i386,
- fpu_xmm3_i386,
- fpu_xmm4_i386,
- fpu_xmm5_i386,
- fpu_xmm6_i386,
- fpu_xmm7_i386,
+ lldb_fctrl_i386,
+ lldb_fstat_i386,
+ lldb_ftag_i386,
+ lldb_fop_i386,
+ lldb_fiseg_i386,
+ lldb_fioff_i386,
+ lldb_foseg_i386,
+ lldb_fooff_i386,
+ lldb_mxcsr_i386,
+ lldb_mxcsrmask_i386,
+ lldb_st0_i386,
+ lldb_st1_i386,
+ lldb_st2_i386,
+ lldb_st3_i386,
+ lldb_st4_i386,
+ lldb_st5_i386,
+ lldb_st6_i386,
+ lldb_st7_i386,
+ lldb_mm0_i386,
+ lldb_mm1_i386,
+ lldb_mm2_i386,
+ lldb_mm3_i386,
+ lldb_mm4_i386,
+ lldb_mm5_i386,
+ lldb_mm6_i386,
+ lldb_mm7_i386,
+ lldb_xmm0_i386,
+ lldb_xmm1_i386,
+ lldb_xmm2_i386,
+ lldb_xmm3_i386,
+ lldb_xmm4_i386,
+ lldb_xmm5_i386,
+ lldb_xmm6_i386,
+ lldb_xmm7_i386,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) - 1 == k_num_fpr_registers_i386,
const uint32_t
g_avx_regnums_i386[] =
{
- fpu_ymm0_i386,
- fpu_ymm1_i386,
- fpu_ymm2_i386,
- fpu_ymm3_i386,
- fpu_ymm4_i386,
- fpu_ymm5_i386,
- fpu_ymm6_i386,
- fpu_ymm7_i386,
+ lldb_ymm0_i386,
+ lldb_ymm1_i386,
+ lldb_ymm2_i386,
+ lldb_ymm3_i386,
+ lldb_ymm4_i386,
+ lldb_ymm5_i386,
+ lldb_ymm6_i386,
+ lldb_ymm7_i386,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 1 == k_num_avx_registers_i386,
static const
uint32_t g_gpr_regnums_x86_64[] =
{
- gpr_rax_x86_64,
- gpr_rbx_x86_64,
- gpr_rcx_x86_64,
- gpr_rdx_x86_64,
- gpr_rdi_x86_64,
- gpr_rsi_x86_64,
- gpr_rbp_x86_64,
- gpr_rsp_x86_64,
- gpr_r8_x86_64,
- gpr_r9_x86_64,
- gpr_r10_x86_64,
- gpr_r11_x86_64,
- gpr_r12_x86_64,
- gpr_r13_x86_64,
- gpr_r14_x86_64,
- gpr_r15_x86_64,
- gpr_rip_x86_64,
- gpr_rflags_x86_64,
- gpr_cs_x86_64,
- gpr_fs_x86_64,
- gpr_gs_x86_64,
- gpr_ss_x86_64,
- gpr_ds_x86_64,
- gpr_es_x86_64,
- gpr_eax_x86_64,
- gpr_ebx_x86_64,
- gpr_ecx_x86_64,
- gpr_edx_x86_64,
- gpr_edi_x86_64,
- gpr_esi_x86_64,
- gpr_ebp_x86_64,
- gpr_esp_x86_64,
- gpr_r8d_x86_64, // Low 32 bits or r8
- gpr_r9d_x86_64, // Low 32 bits or r9
- gpr_r10d_x86_64, // Low 32 bits or r10
- gpr_r11d_x86_64, // Low 32 bits or r11
- gpr_r12d_x86_64, // Low 32 bits or r12
- gpr_r13d_x86_64, // Low 32 bits or r13
- gpr_r14d_x86_64, // Low 32 bits or r14
- gpr_r15d_x86_64, // Low 32 bits or r15
- gpr_ax_x86_64,
- gpr_bx_x86_64,
- gpr_cx_x86_64,
- gpr_dx_x86_64,
- gpr_di_x86_64,
- gpr_si_x86_64,
- gpr_bp_x86_64,
- gpr_sp_x86_64,
- gpr_r8w_x86_64, // Low 16 bits or r8
- gpr_r9w_x86_64, // Low 16 bits or r9
- gpr_r10w_x86_64, // Low 16 bits or r10
- gpr_r11w_x86_64, // Low 16 bits or r11
- gpr_r12w_x86_64, // Low 16 bits or r12
- gpr_r13w_x86_64, // Low 16 bits or r13
- gpr_r14w_x86_64, // Low 16 bits or r14
- gpr_r15w_x86_64, // Low 16 bits or r15
- gpr_ah_x86_64,
- gpr_bh_x86_64,
- gpr_ch_x86_64,
- gpr_dh_x86_64,
- gpr_al_x86_64,
- gpr_bl_x86_64,
- gpr_cl_x86_64,
- gpr_dl_x86_64,
- gpr_dil_x86_64,
- gpr_sil_x86_64,
- gpr_bpl_x86_64,
- gpr_spl_x86_64,
- gpr_r8l_x86_64, // Low 8 bits or r8
- gpr_r9l_x86_64, // Low 8 bits or r9
- gpr_r10l_x86_64, // Low 8 bits or r10
- gpr_r11l_x86_64, // Low 8 bits or r11
- gpr_r12l_x86_64, // Low 8 bits or r12
- gpr_r13l_x86_64, // Low 8 bits or r13
- gpr_r14l_x86_64, // Low 8 bits or r14
- gpr_r15l_x86_64, // Low 8 bits or r15
+ lldb_rax_x86_64,
+ lldb_rbx_x86_64,
+ lldb_rcx_x86_64,
+ lldb_rdx_x86_64,
+ lldb_rdi_x86_64,
+ lldb_rsi_x86_64,
+ lldb_rbp_x86_64,
+ lldb_rsp_x86_64,
+ lldb_r8_x86_64,
+ lldb_r9_x86_64,
+ lldb_r10_x86_64,
+ lldb_r11_x86_64,
+ lldb_r12_x86_64,
+ lldb_r13_x86_64,
+ lldb_r14_x86_64,
+ lldb_r15_x86_64,
+ lldb_rip_x86_64,
+ lldb_rflags_x86_64,
+ lldb_cs_x86_64,
+ lldb_fs_x86_64,
+ lldb_gs_x86_64,
+ lldb_ss_x86_64,
+ lldb_ds_x86_64,
+ lldb_es_x86_64,
+ lldb_eax_x86_64,
+ lldb_ebx_x86_64,
+ lldb_ecx_x86_64,
+ lldb_edx_x86_64,
+ lldb_edi_x86_64,
+ lldb_esi_x86_64,
+ lldb_ebp_x86_64,
+ lldb_esp_x86_64,
+ lldb_r8d_x86_64, // Low 32 bits or r8
+ lldb_r9d_x86_64, // Low 32 bits or r9
+ lldb_r10d_x86_64, // Low 32 bits or r10
+ lldb_r11d_x86_64, // Low 32 bits or r11
+ lldb_r12d_x86_64, // Low 32 bits or r12
+ lldb_r13d_x86_64, // Low 32 bits or r13
+ lldb_r14d_x86_64, // Low 32 bits or r14
+ lldb_r15d_x86_64, // Low 32 bits or r15
+ lldb_ax_x86_64,
+ lldb_bx_x86_64,
+ lldb_cx_x86_64,
+ lldb_dx_x86_64,
+ lldb_di_x86_64,
+ lldb_si_x86_64,
+ lldb_bp_x86_64,
+ lldb_sp_x86_64,
+ lldb_r8w_x86_64, // Low 16 bits or r8
+ lldb_r9w_x86_64, // Low 16 bits or r9
+ lldb_r10w_x86_64, // Low 16 bits or r10
+ lldb_r11w_x86_64, // Low 16 bits or r11
+ lldb_r12w_x86_64, // Low 16 bits or r12
+ lldb_r13w_x86_64, // Low 16 bits or r13
+ lldb_r14w_x86_64, // Low 16 bits or r14
+ lldb_r15w_x86_64, // Low 16 bits or r15
+ lldb_ah_x86_64,
+ lldb_bh_x86_64,
+ lldb_ch_x86_64,
+ lldb_dh_x86_64,
+ lldb_al_x86_64,
+ lldb_bl_x86_64,
+ lldb_cl_x86_64,
+ lldb_dl_x86_64,
+ lldb_dil_x86_64,
+ lldb_sil_x86_64,
+ lldb_bpl_x86_64,
+ lldb_spl_x86_64,
+ lldb_r8l_x86_64, // Low 8 bits or r8
+ lldb_r9l_x86_64, // Low 8 bits or r9
+ lldb_r10l_x86_64, // Low 8 bits or r10
+ lldb_r11l_x86_64, // Low 8 bits or r11
+ lldb_r12l_x86_64, // Low 8 bits or r12
+ lldb_r13l_x86_64, // Low 8 bits or r13
+ lldb_r14l_x86_64, // Low 8 bits or r14
+ lldb_r15l_x86_64, // Low 8 bits or r15
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 1 == k_num_gpr_registers_x86_64,
static const uint32_t
g_fpu_regnums_x86_64[] =
{
- fpu_fctrl_x86_64,
- fpu_fstat_x86_64,
- fpu_ftag_x86_64,
- fpu_fop_x86_64,
- fpu_fiseg_x86_64,
- fpu_fioff_x86_64,
- fpu_foseg_x86_64,
- fpu_fooff_x86_64,
- fpu_mxcsr_x86_64,
- fpu_mxcsrmask_x86_64,
- fpu_st0_x86_64,
- fpu_st1_x86_64,
- fpu_st2_x86_64,
- fpu_st3_x86_64,
- fpu_st4_x86_64,
- fpu_st5_x86_64,
- fpu_st6_x86_64,
- fpu_st7_x86_64,
- fpu_mm0_x86_64,
- fpu_mm1_x86_64,
- fpu_mm2_x86_64,
- fpu_mm3_x86_64,
- fpu_mm4_x86_64,
- fpu_mm5_x86_64,
- fpu_mm6_x86_64,
- fpu_mm7_x86_64,
- fpu_xmm0_x86_64,
- fpu_xmm1_x86_64,
- fpu_xmm2_x86_64,
- fpu_xmm3_x86_64,
- fpu_xmm4_x86_64,
- fpu_xmm5_x86_64,
- fpu_xmm6_x86_64,
- fpu_xmm7_x86_64,
- fpu_xmm8_x86_64,
- fpu_xmm9_x86_64,
- fpu_xmm10_x86_64,
- fpu_xmm11_x86_64,
- fpu_xmm12_x86_64,
- fpu_xmm13_x86_64,
- fpu_xmm14_x86_64,
- fpu_xmm15_x86_64,
+ lldb_fctrl_x86_64,
+ lldb_fstat_x86_64,
+ lldb_ftag_x86_64,
+ lldb_fop_x86_64,
+ lldb_fiseg_x86_64,
+ lldb_fioff_x86_64,
+ lldb_foseg_x86_64,
+ lldb_fooff_x86_64,
+ lldb_mxcsr_x86_64,
+ lldb_mxcsrmask_x86_64,
+ lldb_st0_x86_64,
+ lldb_st1_x86_64,
+ lldb_st2_x86_64,
+ lldb_st3_x86_64,
+ lldb_st4_x86_64,
+ lldb_st5_x86_64,
+ lldb_st6_x86_64,
+ lldb_st7_x86_64,
+ lldb_mm0_x86_64,
+ lldb_mm1_x86_64,
+ lldb_mm2_x86_64,
+ lldb_mm3_x86_64,
+ lldb_mm4_x86_64,
+ lldb_mm5_x86_64,
+ lldb_mm6_x86_64,
+ lldb_mm7_x86_64,
+ lldb_xmm0_x86_64,
+ lldb_xmm1_x86_64,
+ lldb_xmm2_x86_64,
+ lldb_xmm3_x86_64,
+ lldb_xmm4_x86_64,
+ lldb_xmm5_x86_64,
+ lldb_xmm6_x86_64,
+ lldb_xmm7_x86_64,
+ lldb_xmm8_x86_64,
+ lldb_xmm9_x86_64,
+ lldb_xmm10_x86_64,
+ lldb_xmm11_x86_64,
+ lldb_xmm12_x86_64,
+ lldb_xmm13_x86_64,
+ lldb_xmm14_x86_64,
+ lldb_xmm15_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64,
static const uint32_t
g_avx_regnums_x86_64[] =
{
- fpu_ymm0_x86_64,
- fpu_ymm1_x86_64,
- fpu_ymm2_x86_64,
- fpu_ymm3_x86_64,
- fpu_ymm4_x86_64,
- fpu_ymm5_x86_64,
- fpu_ymm6_x86_64,
- fpu_ymm7_x86_64,
- fpu_ymm8_x86_64,
- fpu_ymm9_x86_64,
- fpu_ymm10_x86_64,
- fpu_ymm11_x86_64,
- fpu_ymm12_x86_64,
- fpu_ymm13_x86_64,
- fpu_ymm14_x86_64,
- fpu_ymm15_x86_64,
+ lldb_ymm0_x86_64,
+ lldb_ymm1_x86_64,
+ lldb_ymm2_x86_64,
+ lldb_ymm3_x86_64,
+ lldb_ymm4_x86_64,
+ lldb_ymm5_x86_64,
+ lldb_ymm6_x86_64,
+ lldb_ymm7_x86_64,
+ lldb_ymm8_x86_64,
+ lldb_ymm9_x86_64,
+ lldb_ymm10_x86_64,
+ lldb_ymm11_x86_64,
+ lldb_ymm12_x86_64,
+ lldb_ymm13_x86_64,
+ lldb_ymm14_x86_64,
+ lldb_ymm15_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 1 == k_num_avx_registers_x86_64,
m_reg_info.last_gpr = k_last_gpr_i386;
m_reg_info.first_fpr = k_first_fpr_i386;
m_reg_info.last_fpr = k_last_fpr_i386;
- m_reg_info.first_st = fpu_st0_i386;
- m_reg_info.last_st = fpu_st7_i386;
- m_reg_info.first_mm = fpu_mm0_i386;
- m_reg_info.last_mm = fpu_mm7_i386;
- m_reg_info.first_xmm = fpu_xmm0_i386;
- m_reg_info.last_xmm = fpu_xmm7_i386;
- m_reg_info.first_ymm = fpu_ymm0_i386;
- m_reg_info.last_ymm = fpu_ymm7_i386;
- m_reg_info.first_dr = dr0_i386;
- m_reg_info.gpr_flags = gpr_eflags_i386;
+ m_reg_info.first_st = lldb_st0_i386;
+ m_reg_info.last_st = lldb_st7_i386;
+ m_reg_info.first_mm = lldb_mm0_i386;
+ m_reg_info.last_mm = lldb_mm7_i386;
+ m_reg_info.first_xmm = lldb_xmm0_i386;
+ m_reg_info.last_xmm = lldb_xmm7_i386;
+ m_reg_info.first_ymm = lldb_ymm0_i386;
+ m_reg_info.last_ymm = lldb_ymm7_i386;
+ m_reg_info.first_dr = lldb_dr0_i386;
+ m_reg_info.gpr_flags = lldb_eflags_i386;
break;
case llvm::Triple::x86_64:
m_reg_info.num_registers = k_num_registers_x86_64;
m_reg_info.last_gpr = k_last_gpr_x86_64;
m_reg_info.first_fpr = k_first_fpr_x86_64;
m_reg_info.last_fpr = k_last_fpr_x86_64;
- m_reg_info.first_st = fpu_st0_x86_64;
- m_reg_info.last_st = fpu_st7_x86_64;
- m_reg_info.first_mm = fpu_mm0_x86_64;
- m_reg_info.last_mm = fpu_mm7_x86_64;
- m_reg_info.first_xmm = fpu_xmm0_x86_64;
- m_reg_info.last_xmm = fpu_xmm15_x86_64;
- m_reg_info.first_ymm = fpu_ymm0_x86_64;
- m_reg_info.last_ymm = fpu_ymm15_x86_64;
- m_reg_info.first_dr = dr0_x86_64;
- m_reg_info.gpr_flags = gpr_rflags_x86_64;
+ m_reg_info.first_st = lldb_st0_x86_64;
+ m_reg_info.last_st = lldb_st7_x86_64;
+ m_reg_info.first_mm = lldb_mm0_x86_64;
+ m_reg_info.last_mm = lldb_mm7_x86_64;
+ m_reg_info.first_xmm = lldb_xmm0_x86_64;
+ m_reg_info.last_xmm = lldb_xmm15_x86_64;
+ m_reg_info.first_ymm = lldb_ymm0_x86_64;
+ m_reg_info.last_ymm = lldb_ymm15_x86_64;
+ m_reg_info.first_dr = lldb_dr0_x86_64;
+ m_reg_info.gpr_flags = lldb_rflags_x86_64;
break;
default:
assert(false && "Unhandled target architecture.");
const uint32_t
g_gpr_regnums_i386[] =
{
- gpr_eax_i386,
- gpr_ebx_i386,
- gpr_ecx_i386,
- gpr_edx_i386,
- gpr_edi_i386,
- gpr_esi_i386,
- gpr_ebp_i386,
- gpr_esp_i386,
- gpr_eip_i386,
- gpr_eflags_i386,
- gpr_cs_i386,
- gpr_fs_i386,
- gpr_gs_i386,
- gpr_ss_i386,
- gpr_ds_i386,
- gpr_es_i386,
- gpr_ax_i386,
- gpr_bx_i386,
- gpr_cx_i386,
- gpr_dx_i386,
- gpr_di_i386,
- gpr_si_i386,
- gpr_bp_i386,
- gpr_sp_i386,
- gpr_ah_i386,
- gpr_bh_i386,
- gpr_ch_i386,
- gpr_dh_i386,
- gpr_al_i386,
- gpr_bl_i386,
- gpr_cl_i386,
- gpr_dl_i386,
+ lldb_eax_i386,
+ lldb_ebx_i386,
+ lldb_ecx_i386,
+ lldb_edx_i386,
+ lldb_edi_i386,
+ lldb_esi_i386,
+ lldb_ebp_i386,
+ lldb_esp_i386,
+ lldb_eip_i386,
+ lldb_eflags_i386,
+ lldb_cs_i386,
+ lldb_fs_i386,
+ lldb_gs_i386,
+ lldb_ss_i386,
+ lldb_ds_i386,
+ lldb_es_i386,
+ lldb_ax_i386,
+ lldb_bx_i386,
+ lldb_cx_i386,
+ lldb_dx_i386,
+ lldb_di_i386,
+ lldb_si_i386,
+ lldb_bp_i386,
+ lldb_sp_i386,
+ lldb_ah_i386,
+ lldb_bh_i386,
+ lldb_ch_i386,
+ lldb_dh_i386,
+ lldb_al_i386,
+ lldb_bl_i386,
+ lldb_cl_i386,
+ lldb_dl_i386,
LLDB_INVALID_REGNUM, // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) - 1 == k_num_gpr_registers_i386,
"g_gpr_regnums_i386 has wrong number of register infos");
const uint32_t
-g_fpu_regnums_i386[] =
-{
- fpu_fctrl_i386,
- fpu_fstat_i386,
- fpu_ftag_i386,
- fpu_fop_i386,
- fpu_fiseg_i386,
- fpu_fioff_i386,
- fpu_foseg_i386,
- fpu_fooff_i386,
- fpu_mxcsr_i386,
- fpu_mxcsrmask_i386,
- fpu_st0_i386,
- fpu_st1_i386,
- fpu_st2_i386,
- fpu_st3_i386,
- fpu_st4_i386,
- fpu_st5_i386,
- fpu_st6_i386,
- fpu_st7_i386,
- fpu_mm0_i386,
- fpu_mm1_i386,
- fpu_mm2_i386,
- fpu_mm3_i386,
- fpu_mm4_i386,
- fpu_mm5_i386,
- fpu_mm6_i386,
- fpu_mm7_i386,
- fpu_xmm0_i386,
- fpu_xmm1_i386,
- fpu_xmm2_i386,
- fpu_xmm3_i386,
- fpu_xmm4_i386,
- fpu_xmm5_i386,
- fpu_xmm6_i386,
- fpu_xmm7_i386,
+g_lldb_regnums_i386[] =
+{
+ lldb_fctrl_i386,
+ lldb_fstat_i386,
+ lldb_ftag_i386,
+ lldb_fop_i386,
+ lldb_fiseg_i386,
+ lldb_fioff_i386,
+ lldb_foseg_i386,
+ lldb_fooff_i386,
+ lldb_mxcsr_i386,
+ lldb_mxcsrmask_i386,
+ lldb_st0_i386,
+ lldb_st1_i386,
+ lldb_st2_i386,
+ lldb_st3_i386,
+ lldb_st4_i386,
+ lldb_st5_i386,
+ lldb_st6_i386,
+ lldb_st7_i386,
+ lldb_mm0_i386,
+ lldb_mm1_i386,
+ lldb_mm2_i386,
+ lldb_mm3_i386,
+ lldb_mm4_i386,
+ lldb_mm5_i386,
+ lldb_mm6_i386,
+ lldb_mm7_i386,
+ lldb_xmm0_i386,
+ lldb_xmm1_i386,
+ lldb_xmm2_i386,
+ lldb_xmm3_i386,
+ lldb_xmm4_i386,
+ lldb_xmm5_i386,
+ lldb_xmm6_i386,
+ lldb_xmm7_i386,
LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) - 1 == k_num_fpr_registers_i386,
- "g_fpu_regnums_i386 has wrong number of register infos");
+static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) - 1 == k_num_fpr_registers_i386,
+ "g_lldb_regnums_i386 has wrong number of register infos");
const uint32_t
g_avx_regnums_i386[] =
{
- fpu_ymm0_i386,
- fpu_ymm1_i386,
- fpu_ymm2_i386,
- fpu_ymm3_i386,
- fpu_ymm4_i386,
- fpu_ymm5_i386,
- fpu_ymm6_i386,
- fpu_ymm7_i386,
+ lldb_ymm0_i386,
+ lldb_ymm1_i386,
+ lldb_ymm2_i386,
+ lldb_ymm3_i386,
+ lldb_ymm4_i386,
+ lldb_ymm5_i386,
+ lldb_ymm6_i386,
+ lldb_ymm7_i386,
LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) - 1 == k_num_avx_registers_i386,
static const
uint32_t g_gpr_regnums_x86_64[] =
{
- gpr_rax_x86_64,
- gpr_rbx_x86_64,
- gpr_rcx_x86_64,
- gpr_rdx_x86_64,
- gpr_rdi_x86_64,
- gpr_rsi_x86_64,
- gpr_rbp_x86_64,
- gpr_rsp_x86_64,
- gpr_r8_x86_64,
- gpr_r9_x86_64,
- gpr_r10_x86_64,
- gpr_r11_x86_64,
- gpr_r12_x86_64,
- gpr_r13_x86_64,
- gpr_r14_x86_64,
- gpr_r15_x86_64,
- gpr_rip_x86_64,
- gpr_rflags_x86_64,
- gpr_cs_x86_64,
- gpr_fs_x86_64,
- gpr_gs_x86_64,
- gpr_ss_x86_64,
- gpr_ds_x86_64,
- gpr_es_x86_64,
- gpr_eax_x86_64,
- gpr_ebx_x86_64,
- gpr_ecx_x86_64,
- gpr_edx_x86_64,
- gpr_edi_x86_64,
- gpr_esi_x86_64,
- gpr_ebp_x86_64,
- gpr_esp_x86_64,
- gpr_r8d_x86_64, // Low 32 bits or r8
- gpr_r9d_x86_64, // Low 32 bits or r9
- gpr_r10d_x86_64, // Low 32 bits or r10
- gpr_r11d_x86_64, // Low 32 bits or r11
- gpr_r12d_x86_64, // Low 32 bits or r12
- gpr_r13d_x86_64, // Low 32 bits or r13
- gpr_r14d_x86_64, // Low 32 bits or r14
- gpr_r15d_x86_64, // Low 32 bits or r15
- gpr_ax_x86_64,
- gpr_bx_x86_64,
- gpr_cx_x86_64,
- gpr_dx_x86_64,
- gpr_di_x86_64,
- gpr_si_x86_64,
- gpr_bp_x86_64,
- gpr_sp_x86_64,
- gpr_r8w_x86_64, // Low 16 bits or r8
- gpr_r9w_x86_64, // Low 16 bits or r9
- gpr_r10w_x86_64, // Low 16 bits or r10
- gpr_r11w_x86_64, // Low 16 bits or r11
- gpr_r12w_x86_64, // Low 16 bits or r12
- gpr_r13w_x86_64, // Low 16 bits or r13
- gpr_r14w_x86_64, // Low 16 bits or r14
- gpr_r15w_x86_64, // Low 16 bits or r15
- gpr_ah_x86_64,
- gpr_bh_x86_64,
- gpr_ch_x86_64,
- gpr_dh_x86_64,
- gpr_al_x86_64,
- gpr_bl_x86_64,
- gpr_cl_x86_64,
- gpr_dl_x86_64,
- gpr_dil_x86_64,
- gpr_sil_x86_64,
- gpr_bpl_x86_64,
- gpr_spl_x86_64,
- gpr_r8l_x86_64, // Low 8 bits or r8
- gpr_r9l_x86_64, // Low 8 bits or r9
- gpr_r10l_x86_64, // Low 8 bits or r10
- gpr_r11l_x86_64, // Low 8 bits or r11
- gpr_r12l_x86_64, // Low 8 bits or r12
- gpr_r13l_x86_64, // Low 8 bits or r13
- gpr_r14l_x86_64, // Low 8 bits or r14
- gpr_r15l_x86_64, // Low 8 bits or r15
+ lldb_rax_x86_64,
+ lldb_rbx_x86_64,
+ lldb_rcx_x86_64,
+ lldb_rdx_x86_64,
+ lldb_rdi_x86_64,
+ lldb_rsi_x86_64,
+ lldb_rbp_x86_64,
+ lldb_rsp_x86_64,
+ lldb_r8_x86_64,
+ lldb_r9_x86_64,
+ lldb_r10_x86_64,
+ lldb_r11_x86_64,
+ lldb_r12_x86_64,
+ lldb_r13_x86_64,
+ lldb_r14_x86_64,
+ lldb_r15_x86_64,
+ lldb_rip_x86_64,
+ lldb_rflags_x86_64,
+ lldb_cs_x86_64,
+ lldb_fs_x86_64,
+ lldb_gs_x86_64,
+ lldb_ss_x86_64,
+ lldb_ds_x86_64,
+ lldb_es_x86_64,
+ lldb_eax_x86_64,
+ lldb_ebx_x86_64,
+ lldb_ecx_x86_64,
+ lldb_edx_x86_64,
+ lldb_edi_x86_64,
+ lldb_esi_x86_64,
+ lldb_ebp_x86_64,
+ lldb_esp_x86_64,
+ lldb_r8d_x86_64, // Low 32 bits or r8
+ lldb_r9d_x86_64, // Low 32 bits or r9
+ lldb_r10d_x86_64, // Low 32 bits or r10
+ lldb_r11d_x86_64, // Low 32 bits or r11
+ lldb_r12d_x86_64, // Low 32 bits or r12
+ lldb_r13d_x86_64, // Low 32 bits or r13
+ lldb_r14d_x86_64, // Low 32 bits or r14
+ lldb_r15d_x86_64, // Low 32 bits or r15
+ lldb_ax_x86_64,
+ lldb_bx_x86_64,
+ lldb_cx_x86_64,
+ lldb_dx_x86_64,
+ lldb_di_x86_64,
+ lldb_si_x86_64,
+ lldb_bp_x86_64,
+ lldb_sp_x86_64,
+ lldb_r8w_x86_64, // Low 16 bits or r8
+ lldb_r9w_x86_64, // Low 16 bits or r9
+ lldb_r10w_x86_64, // Low 16 bits or r10
+ lldb_r11w_x86_64, // Low 16 bits or r11
+ lldb_r12w_x86_64, // Low 16 bits or r12
+ lldb_r13w_x86_64, // Low 16 bits or r13
+ lldb_r14w_x86_64, // Low 16 bits or r14
+ lldb_r15w_x86_64, // Low 16 bits or r15
+ lldb_ah_x86_64,
+ lldb_bh_x86_64,
+ lldb_ch_x86_64,
+ lldb_dh_x86_64,
+ lldb_al_x86_64,
+ lldb_bl_x86_64,
+ lldb_cl_x86_64,
+ lldb_dl_x86_64,
+ lldb_dil_x86_64,
+ lldb_sil_x86_64,
+ lldb_bpl_x86_64,
+ lldb_spl_x86_64,
+ lldb_r8l_x86_64, // Low 8 bits or r8
+ lldb_r9l_x86_64, // Low 8 bits or r9
+ lldb_r10l_x86_64, // Low 8 bits or r10
+ lldb_r11l_x86_64, // Low 8 bits or r11
+ lldb_r12l_x86_64, // Low 8 bits or r12
+ lldb_r13l_x86_64, // Low 8 bits or r13
+ lldb_r14l_x86_64, // Low 8 bits or r14
+ lldb_r15l_x86_64, // Low 8 bits or r15
LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) - 1 == k_num_gpr_registers_x86_64,
"g_gpr_regnums_x86_64 has wrong number of register infos");
static const uint32_t
-g_fpu_regnums_x86_64[] =
-{
- fpu_fctrl_x86_64,
- fpu_fstat_x86_64,
- fpu_ftag_x86_64,
- fpu_fop_x86_64,
- fpu_fiseg_x86_64,
- fpu_fioff_x86_64,
- fpu_foseg_x86_64,
- fpu_fooff_x86_64,
- fpu_mxcsr_x86_64,
- fpu_mxcsrmask_x86_64,
- fpu_st0_x86_64,
- fpu_st1_x86_64,
- fpu_st2_x86_64,
- fpu_st3_x86_64,
- fpu_st4_x86_64,
- fpu_st5_x86_64,
- fpu_st6_x86_64,
- fpu_st7_x86_64,
- fpu_mm0_x86_64,
- fpu_mm1_x86_64,
- fpu_mm2_x86_64,
- fpu_mm3_x86_64,
- fpu_mm4_x86_64,
- fpu_mm5_x86_64,
- fpu_mm6_x86_64,
- fpu_mm7_x86_64,
- fpu_xmm0_x86_64,
- fpu_xmm1_x86_64,
- fpu_xmm2_x86_64,
- fpu_xmm3_x86_64,
- fpu_xmm4_x86_64,
- fpu_xmm5_x86_64,
- fpu_xmm6_x86_64,
- fpu_xmm7_x86_64,
- fpu_xmm8_x86_64,
- fpu_xmm9_x86_64,
- fpu_xmm10_x86_64,
- fpu_xmm11_x86_64,
- fpu_xmm12_x86_64,
- fpu_xmm13_x86_64,
- fpu_xmm14_x86_64,
- fpu_xmm15_x86_64,
+g_lldb_regnums_x86_64[] =
+{
+ lldb_fctrl_x86_64,
+ lldb_fstat_x86_64,
+ lldb_ftag_x86_64,
+ lldb_fop_x86_64,
+ lldb_fiseg_x86_64,
+ lldb_fioff_x86_64,
+ lldb_foseg_x86_64,
+ lldb_fooff_x86_64,
+ lldb_mxcsr_x86_64,
+ lldb_mxcsrmask_x86_64,
+ lldb_st0_x86_64,
+ lldb_st1_x86_64,
+ lldb_st2_x86_64,
+ lldb_st3_x86_64,
+ lldb_st4_x86_64,
+ lldb_st5_x86_64,
+ lldb_st6_x86_64,
+ lldb_st7_x86_64,
+ lldb_mm0_x86_64,
+ lldb_mm1_x86_64,
+ lldb_mm2_x86_64,
+ lldb_mm3_x86_64,
+ lldb_mm4_x86_64,
+ lldb_mm5_x86_64,
+ lldb_mm6_x86_64,
+ lldb_mm7_x86_64,
+ lldb_xmm0_x86_64,
+ lldb_xmm1_x86_64,
+ lldb_xmm2_x86_64,
+ lldb_xmm3_x86_64,
+ lldb_xmm4_x86_64,
+ lldb_xmm5_x86_64,
+ lldb_xmm6_x86_64,
+ lldb_xmm7_x86_64,
+ lldb_xmm8_x86_64,
+ lldb_xmm9_x86_64,
+ lldb_xmm10_x86_64,
+ lldb_xmm11_x86_64,
+ lldb_xmm12_x86_64,
+ lldb_xmm13_x86_64,
+ lldb_xmm14_x86_64,
+ lldb_xmm15_x86_64,
LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
-static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64,
- "g_fpu_regnums_x86_64 has wrong number of register infos");
+static_assert((sizeof(g_lldb_regnums_x86_64) / sizeof(g_lldb_regnums_x86_64[0])) - 1 == k_num_fpr_registers_x86_64,
+ "g_lldb_regnums_x86_64 has wrong number of register infos");
static const uint32_t
g_avx_regnums_x86_64[] =
{
- fpu_ymm0_x86_64,
- fpu_ymm1_x86_64,
- fpu_ymm2_x86_64,
- fpu_ymm3_x86_64,
- fpu_ymm4_x86_64,
- fpu_ymm5_x86_64,
- fpu_ymm6_x86_64,
- fpu_ymm7_x86_64,
- fpu_ymm8_x86_64,
- fpu_ymm9_x86_64,
- fpu_ymm10_x86_64,
- fpu_ymm11_x86_64,
- fpu_ymm12_x86_64,
- fpu_ymm13_x86_64,
- fpu_ymm14_x86_64,
- fpu_ymm15_x86_64,
+ lldb_ymm0_x86_64,
+ lldb_ymm1_x86_64,
+ lldb_ymm2_x86_64,
+ lldb_ymm3_x86_64,
+ lldb_ymm4_x86_64,
+ lldb_ymm5_x86_64,
+ lldb_ymm6_x86_64,
+ lldb_ymm7_x86_64,
+ lldb_ymm8_x86_64,
+ lldb_ymm9_x86_64,
+ lldb_ymm10_x86_64,
+ lldb_ymm11_x86_64,
+ lldb_ymm12_x86_64,
+ lldb_ymm13_x86_64,
+ lldb_ymm14_x86_64,
+ lldb_ymm15_x86_64,
LLDB_INVALID_REGNUM // Register sets must be terminated with LLDB_INVALID_REGNUM.
};
static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) - 1 == k_num_avx_registers_x86_64,
"g_avx_regnums_x86_64 has wrong number of register infos");
-uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = { gpr_eax_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = { gpr_ebx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = { gpr_ecx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = { gpr_edx_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = { gpr_edi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = { gpr_esi_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = { gpr_ebp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = { gpr_esp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = { gpr_eax_i386, gpr_ax_i386, gpr_ah_i386, gpr_al_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = { gpr_ebx_i386, gpr_bx_i386, gpr_bh_i386, gpr_bl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = { gpr_ecx_i386, gpr_cx_i386, gpr_ch_i386, gpr_cl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = { gpr_edx_i386, gpr_dx_i386, gpr_dh_i386, gpr_dl_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = { gpr_edi_i386, gpr_di_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = { gpr_esi_i386, gpr_si_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = { gpr_ebp_i386, gpr_bp_i386, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = { gpr_esp_i386, gpr_sp_i386, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = { gpr_rax_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = { gpr_rbx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = { gpr_rcx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = { gpr_rdx_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = { gpr_rdi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = { gpr_rsi_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = { gpr_rbp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = { gpr_rsp_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = { gpr_r8_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = { gpr_r9_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = { gpr_r10_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = { gpr_r11_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = { gpr_r12_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = { gpr_r13_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = { gpr_r14_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = { gpr_r15_x86_64, LLDB_INVALID_REGNUM };
-
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = { gpr_rax_x86_64, gpr_eax_x86_64, gpr_ax_x86_64, gpr_ah_x86_64, gpr_al_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = { gpr_rbx_x86_64, gpr_ebx_x86_64, gpr_bx_x86_64, gpr_bh_x86_64, gpr_bl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = { gpr_rcx_x86_64, gpr_ecx_x86_64, gpr_cx_x86_64, gpr_ch_x86_64, gpr_cl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = { gpr_rdx_x86_64, gpr_edx_x86_64, gpr_dx_x86_64, gpr_dh_x86_64, gpr_dl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = { gpr_rdi_x86_64, gpr_edi_x86_64, gpr_di_x86_64, gpr_dil_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = { gpr_rsi_x86_64, gpr_esi_x86_64, gpr_si_x86_64, gpr_sil_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = { gpr_rbp_x86_64, gpr_ebp_x86_64, gpr_bp_x86_64, gpr_bpl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = { gpr_rsp_x86_64, gpr_esp_x86_64, gpr_sp_x86_64, gpr_spl_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = { gpr_r8_x86_64, gpr_r8d_x86_64, gpr_r8w_x86_64, gpr_r8l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = { gpr_r9_x86_64, gpr_r9d_x86_64, gpr_r9w_x86_64, gpr_r9l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = { gpr_r10_x86_64, gpr_r10d_x86_64, gpr_r10w_x86_64, gpr_r10l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = { gpr_r11_x86_64, gpr_r11d_x86_64, gpr_r11w_x86_64, gpr_r11l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = { gpr_r12_x86_64, gpr_r12d_x86_64, gpr_r12w_x86_64, gpr_r12l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = { gpr_r13_x86_64, gpr_r13d_x86_64, gpr_r13w_x86_64, gpr_r13l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = { gpr_r14_x86_64, gpr_r14d_x86_64, gpr_r14w_x86_64, gpr_r14l_x86_64, LLDB_INVALID_REGNUM };
-uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = { gpr_r15_x86_64, gpr_r15d_x86_64, gpr_r15w_x86_64, gpr_r15l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = { lldb_eax_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = { lldb_ebx_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = { lldb_ecx_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = { lldb_edx_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = { lldb_edi_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = { lldb_esi_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = { lldb_ebp_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = { lldb_esp_i386, LLDB_INVALID_REGNUM };
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = { lldb_eax_i386, lldb_ax_i386, lldb_ah_i386, lldb_al_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = { lldb_ebx_i386, lldb_bx_i386, lldb_bh_i386, lldb_bl_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = { lldb_ecx_i386, lldb_cx_i386, lldb_ch_i386, lldb_cl_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = { lldb_edx_i386, lldb_dx_i386, lldb_dh_i386, lldb_dl_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = { lldb_edi_i386, lldb_di_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = { lldb_esi_i386, lldb_si_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = { lldb_ebp_i386, lldb_bp_i386, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = { lldb_esp_i386, lldb_sp_i386, LLDB_INVALID_REGNUM };
+
+uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = { lldb_rax_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = { lldb_rbx_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = { lldb_rcx_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = { lldb_rdx_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = { lldb_rdi_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = { lldb_rsi_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = { lldb_rbp_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = { lldb_rsp_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = { lldb_r8_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = { lldb_r9_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = { lldb_r10_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = { lldb_r11_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = { lldb_r12_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = { lldb_r13_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = { lldb_r14_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = { lldb_r15_x86_64, LLDB_INVALID_REGNUM };
+
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = { lldb_rax_x86_64, lldb_eax_x86_64, lldb_ax_x86_64, lldb_ah_x86_64, lldb_al_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = { lldb_rbx_x86_64, lldb_ebx_x86_64, lldb_bx_x86_64, lldb_bh_x86_64, lldb_bl_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = { lldb_rcx_x86_64, lldb_ecx_x86_64, lldb_cx_x86_64, lldb_ch_x86_64, lldb_cl_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = { lldb_rdx_x86_64, lldb_edx_x86_64, lldb_dx_x86_64, lldb_dh_x86_64, lldb_dl_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = { lldb_rdi_x86_64, lldb_edi_x86_64, lldb_di_x86_64, lldb_dil_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = { lldb_rsi_x86_64, lldb_esi_x86_64, lldb_si_x86_64, lldb_sil_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = { lldb_rbp_x86_64, lldb_ebp_x86_64, lldb_bp_x86_64, lldb_bpl_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = { lldb_rsp_x86_64, lldb_esp_x86_64, lldb_sp_x86_64, lldb_spl_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = { lldb_r8_x86_64, lldb_r8d_x86_64, lldb_r8w_x86_64, lldb_r8l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = { lldb_r9_x86_64, lldb_r9d_x86_64, lldb_r9w_x86_64, lldb_r9l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = { lldb_r10_x86_64, lldb_r10d_x86_64, lldb_r10w_x86_64, lldb_r10l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = { lldb_r11_x86_64, lldb_r11d_x86_64, lldb_r11w_x86_64, lldb_r11l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = { lldb_r12_x86_64, lldb_r12d_x86_64, lldb_r12w_x86_64, lldb_r12l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = { lldb_r13_x86_64, lldb_r13d_x86_64, lldb_r13w_x86_64, lldb_r13l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = { lldb_r14_x86_64, lldb_r14d_x86_64, lldb_r14w_x86_64, lldb_r14l_x86_64, LLDB_INVALID_REGNUM };
+uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = { lldb_r15_x86_64, lldb_r15d_x86_64, lldb_r15w_x86_64, lldb_r15l_x86_64, LLDB_INVALID_REGNUM };
// Number of register sets provided by this context.
enum
g_reg_sets_i386[k_num_register_sets] =
{
{ "General Purpose Registers", "gpr", k_num_gpr_registers_i386, g_gpr_regnums_i386 },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_i386, g_fpu_regnums_i386 },
+ { "Floating Point Registers", "fpu", k_num_fpr_registers_i386, g_lldb_regnums_i386 },
{ "Advanced Vector Extensions", "avx", k_num_avx_registers_i386, g_avx_regnums_i386 }
};
g_reg_sets_x86_64[k_num_register_sets] =
{
{ "General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, g_gpr_regnums_x86_64 },
- { "Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, g_fpu_regnums_x86_64 },
+ { "Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, g_lldb_regnums_x86_64 },
{ "Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, g_avx_regnums_x86_64 }
};
m_reg_info.last_gpr = k_last_gpr_i386;
m_reg_info.first_fpr = k_first_fpr_i386;
m_reg_info.last_fpr = k_last_fpr_i386;
- m_reg_info.first_st = fpu_st0_i386;
- m_reg_info.last_st = fpu_st7_i386;
- m_reg_info.first_mm = fpu_mm0_i386;
- m_reg_info.last_mm = fpu_mm7_i386;
- m_reg_info.first_xmm = fpu_xmm0_i386;
- m_reg_info.last_xmm = fpu_xmm7_i386;
- m_reg_info.first_ymm = fpu_ymm0_i386;
- m_reg_info.last_ymm = fpu_ymm7_i386;
- m_reg_info.first_dr = dr0_i386;
- m_reg_info.gpr_flags = gpr_eflags_i386;
+ m_reg_info.first_st = lldb_st0_i386;
+ m_reg_info.last_st = lldb_st7_i386;
+ m_reg_info.first_mm = lldb_mm0_i386;
+ m_reg_info.last_mm = lldb_mm7_i386;
+ m_reg_info.first_xmm = lldb_xmm0_i386;
+ m_reg_info.last_xmm = lldb_xmm7_i386;
+ m_reg_info.first_ymm = lldb_ymm0_i386;
+ m_reg_info.last_ymm = lldb_ymm7_i386;
+ m_reg_info.first_dr = lldb_dr0_i386;
+ m_reg_info.gpr_flags = lldb_eflags_i386;
break;
case llvm::Triple::x86_64:
m_reg_info.num_registers = k_num_registers_x86_64;
m_reg_info.last_gpr = k_last_gpr_x86_64;
m_reg_info.first_fpr = k_first_fpr_x86_64;
m_reg_info.last_fpr = k_last_fpr_x86_64;
- m_reg_info.first_st = fpu_st0_x86_64;
- m_reg_info.last_st = fpu_st7_x86_64;
- m_reg_info.first_mm = fpu_mm0_x86_64;
- m_reg_info.last_mm = fpu_mm7_x86_64;
- m_reg_info.first_xmm = fpu_xmm0_x86_64;
- m_reg_info.last_xmm = fpu_xmm15_x86_64;
- m_reg_info.first_ymm = fpu_ymm0_x86_64;
- m_reg_info.last_ymm = fpu_ymm15_x86_64;
- m_reg_info.first_dr = dr0_x86_64;
- m_reg_info.gpr_flags = gpr_rflags_x86_64;
+ m_reg_info.first_st = lldb_st0_x86_64;
+ m_reg_info.last_st = lldb_st7_x86_64;
+ m_reg_info.first_mm = lldb_mm0_x86_64;
+ m_reg_info.last_mm = lldb_mm7_x86_64;
+ m_reg_info.first_xmm = lldb_xmm0_x86_64;
+ m_reg_info.last_xmm = lldb_xmm15_x86_64;
+ m_reg_info.first_ymm = lldb_ymm0_x86_64;
+ m_reg_info.last_ymm = lldb_ymm15_x86_64;
+ m_reg_info.first_dr = lldb_dr0_x86_64;
+ m_reg_info.gpr_flags = lldb_rflags_x86_64;
break;
default:
assert(false && "Unhandled target architecture.");
// Note that the size and offset will be updated by platform-specific classes.
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_i386 }, NULL, NULL }
+ eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, NULL, NULL }
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
{ #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, fpu_##name##_i386 }, NULL, NULL }
+ eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL }
// RegisterKind: GCC, DWARF, Generic, GDB, LLDB
#define DEFINE_FP_ST(reg, i) \
{ #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { gcc_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, gdb_st##i##_i386, fpu_st##i##_i386 }, \
+ { gcc_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, gdb_st##i##_i386, lldb_st##i##_i386 }, \
NULL, NULL }
#define DEFINE_FP_MM(reg, i) \
{ #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
eEncodingUint, eFormatHex, \
- { gcc_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, gdb_mm##i##_i386, fpu_mm##i##_i386 }, \
+ { gcc_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, gdb_mm##i##_i386, lldb_mm##i##_i386 }, \
NULL, NULL }
#define DEFINE_XMM(reg, i) \
{ #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { gcc_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##_i386, fpu_##reg##i##_i386}, \
+ { gcc_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##_i386, lldb_##reg##i##_i386}, \
NULL, NULL }
// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size.
#define DEFINE_YMM(reg, i) \
{ #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(reg[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##h_i386, fpu_##reg##i##_i386 }, \
+ { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, gdb_##reg##i##h_i386, lldb_##reg##i##_i386 }, \
NULL, NULL }
#define DEFINE_DR(reg, i) \
#define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
{ #reg16, NULL, 2, GPR_OFFSET(reg32), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
#define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
{ #reg8, NULL, 1, GPR_OFFSET(reg32)+1, eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
#define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
{ #reg8, NULL, 1, GPR_OFFSET(reg32), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
static RegisterInfo
g_register_infos_i386[] =
// Note that the size and offset will be updated by platform-specific classes.
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_x86_64 }, NULL, NULL }
+ eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL }
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
{ #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, \
- eFormatHex, { kind1, kind2, kind3, kind4, fpu_##name##_x86_64 }, NULL, NULL }
+ eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL }
#define DEFINE_FP_ST(reg, i) \
{ #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { gcc_dwarf_st##i##_x86_64, gcc_dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, fpu_st##i##_x86_64 }, \
+ { gcc_dwarf_st##i##_x86_64, gcc_dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, lldb_st##i##_x86_64 }, \
NULL, NULL }
#define DEFINE_FP_MM(reg, i) \
{ #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]), \
eEncodingUint, eFormatHex, \
- { gcc_dwarf_mm##i##_x86_64, gcc_dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, fpu_mm##i##_x86_64 }, \
+ { gcc_dwarf_mm##i##_x86_64, gcc_dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, gdb_st##i##_x86_64, lldb_mm##i##_x86_64 }, \
NULL, NULL }
#define DEFINE_XMM(reg, i) \
{ #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { gcc_dwarf_##reg##i##_x86_64, gcc_dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##_x86_64, fpu_##reg##i##_x86_64}, \
+ { gcc_dwarf_##reg##i##_x86_64, gcc_dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##_x86_64, lldb_##reg##i##_x86_64}, \
NULL, NULL }
#define DEFINE_YMM(reg, i) \
{ #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(reg[i]), \
eEncodingVector, eFormatVectorOfUInt8, \
- { gcc_dwarf_##reg##i##h_x86_64, gcc_dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##h_x86_64, fpu_##reg##i##_x86_64 }, \
+ { gcc_dwarf_##reg##i##h_x86_64, gcc_dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, gdb_##reg##i##h_x86_64, lldb_##reg##i##_x86_64 }, \
NULL, NULL }
#define DEFINE_DR(reg, i) \
#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
{ #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
{ #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
{ #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
{ #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint, \
- eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+ eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
static RegisterInfo
g_register_infos_x86_64[] =
#define UPDATE_GPR_INFO(reg, reg64) \
do { \
- g_register_infos[gpr_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \
+ g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \
} while(false);
#define UPDATE_GPR_INFO_8H(reg, reg64) \
do { \
- g_register_infos[gpr_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \
+ g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \
} while(false);
#define UPDATE_FPR_INFO(reg, reg64) \
do { \
- g_register_infos[fpu_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \
+ g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \
} while(false);
#define UPDATE_FP_INFO(reg, i) \
do { \
- g_register_infos[fpu_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \
+ g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \
} while(false);
#define UPDATE_XMM_INFO(reg, i) \
do { \
- g_register_infos[fpu_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \
+ g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \
} while(false);
#define UPDATE_YMM_INFO(reg, i) \
do { \
- g_register_infos[fpu_##reg##i##_i386].byte_offset = YMM_OFFSET(reg[i]); \
+ g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(reg[i]); \
} while(false);
#define UPDATE_DR_INFO(reg_index) \
do { \
- g_register_infos[dr##reg_index##_i386].byte_offset = DR_OFFSET(reg_index); \
+ g_register_infos[lldb_dr##reg_index##_i386].byte_offset = DR_OFFSET(reg_index); \
} while(false);
// Update the register offsets
namespace lldb_private
{
+ // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
//---------------------------------------------------------------------------
// Internal codes for all i386 registers.
enum
{
k_first_gpr_i386,
- gpr_eax_i386 = k_first_gpr_i386,
- gpr_ebx_i386,
- gpr_ecx_i386,
- gpr_edx_i386,
- gpr_edi_i386,
- gpr_esi_i386,
- gpr_ebp_i386,
- gpr_esp_i386,
- gpr_eip_i386,
- gpr_eflags_i386,
- gpr_cs_i386,
- gpr_fs_i386,
- gpr_gs_i386,
- gpr_ss_i386,
- gpr_ds_i386,
- gpr_es_i386,
+ lldb_eax_i386 = k_first_gpr_i386,
+ lldb_ebx_i386,
+ lldb_ecx_i386,
+ lldb_edx_i386,
+ lldb_edi_i386,
+ lldb_esi_i386,
+ lldb_ebp_i386,
+ lldb_esp_i386,
+ lldb_eip_i386,
+ lldb_eflags_i386,
+ lldb_cs_i386,
+ lldb_fs_i386,
+ lldb_gs_i386,
+ lldb_ss_i386,
+ lldb_ds_i386,
+ lldb_es_i386,
k_first_alias_i386,
- gpr_ax_i386 = k_first_alias_i386,
- gpr_bx_i386,
- gpr_cx_i386,
- gpr_dx_i386,
- gpr_di_i386,
- gpr_si_i386,
- gpr_bp_i386,
- gpr_sp_i386,
- gpr_ah_i386,
- gpr_bh_i386,
- gpr_ch_i386,
- gpr_dh_i386,
- gpr_al_i386,
- gpr_bl_i386,
- gpr_cl_i386,
- gpr_dl_i386,
- k_last_alias_i386 = gpr_dl_i386,
+ lldb_ax_i386 = k_first_alias_i386,
+ lldb_bx_i386,
+ lldb_cx_i386,
+ lldb_dx_i386,
+ lldb_di_i386,
+ lldb_si_i386,
+ lldb_bp_i386,
+ lldb_sp_i386,
+ lldb_ah_i386,
+ lldb_bh_i386,
+ lldb_ch_i386,
+ lldb_dh_i386,
+ lldb_al_i386,
+ lldb_bl_i386,
+ lldb_cl_i386,
+ lldb_dl_i386,
+ k_last_alias_i386 = lldb_dl_i386,
k_last_gpr_i386 = k_last_alias_i386,
k_first_fpr_i386,
- fpu_fctrl_i386 = k_first_fpr_i386,
- fpu_fstat_i386,
- fpu_ftag_i386,
- fpu_fop_i386,
- fpu_fiseg_i386,
- fpu_fioff_i386,
- fpu_foseg_i386,
- fpu_fooff_i386,
- fpu_mxcsr_i386,
- fpu_mxcsrmask_i386,
- fpu_st0_i386,
- fpu_st1_i386,
- fpu_st2_i386,
- fpu_st3_i386,
- fpu_st4_i386,
- fpu_st5_i386,
- fpu_st6_i386,
- fpu_st7_i386,
- fpu_mm0_i386,
- fpu_mm1_i386,
- fpu_mm2_i386,
- fpu_mm3_i386,
- fpu_mm4_i386,
- fpu_mm5_i386,
- fpu_mm6_i386,
- fpu_mm7_i386,
- fpu_xmm0_i386,
- fpu_xmm1_i386,
- fpu_xmm2_i386,
- fpu_xmm3_i386,
- fpu_xmm4_i386,
- fpu_xmm5_i386,
- fpu_xmm6_i386,
- fpu_xmm7_i386,
- k_last_fpr_i386 = fpu_xmm7_i386,
+ lldb_fctrl_i386 = k_first_fpr_i386,
+ lldb_fstat_i386,
+ lldb_ftag_i386,
+ lldb_fop_i386,
+ lldb_fiseg_i386,
+ lldb_fioff_i386,
+ lldb_foseg_i386,
+ lldb_fooff_i386,
+ lldb_mxcsr_i386,
+ lldb_mxcsrmask_i386,
+ lldb_st0_i386,
+ lldb_st1_i386,
+ lldb_st2_i386,
+ lldb_st3_i386,
+ lldb_st4_i386,
+ lldb_st5_i386,
+ lldb_st6_i386,
+ lldb_st7_i386,
+ lldb_mm0_i386,
+ lldb_mm1_i386,
+ lldb_mm2_i386,
+ lldb_mm3_i386,
+ lldb_mm4_i386,
+ lldb_mm5_i386,
+ lldb_mm6_i386,
+ lldb_mm7_i386,
+ lldb_xmm0_i386,
+ lldb_xmm1_i386,
+ lldb_xmm2_i386,
+ lldb_xmm3_i386,
+ lldb_xmm4_i386,
+ lldb_xmm5_i386,
+ lldb_xmm6_i386,
+ lldb_xmm7_i386,
+ k_last_fpr_i386 = lldb_xmm7_i386,
k_first_avx_i386,
- fpu_ymm0_i386 = k_first_avx_i386,
- fpu_ymm1_i386,
- fpu_ymm2_i386,
- fpu_ymm3_i386,
- fpu_ymm4_i386,
- fpu_ymm5_i386,
- fpu_ymm6_i386,
- fpu_ymm7_i386,
- k_last_avx_i386 = fpu_ymm7_i386,
+ lldb_ymm0_i386 = k_first_avx_i386,
+ lldb_ymm1_i386,
+ lldb_ymm2_i386,
+ lldb_ymm3_i386,
+ lldb_ymm4_i386,
+ lldb_ymm5_i386,
+ lldb_ymm6_i386,
+ lldb_ymm7_i386,
+ k_last_avx_i386 = lldb_ymm7_i386,
- dr0_i386,
- dr1_i386,
- dr2_i386,
- dr3_i386,
- dr4_i386,
- dr5_i386,
- dr6_i386,
- dr7_i386,
+ lldb_dr0_i386,
+ lldb_dr1_i386,
+ lldb_dr2_i386,
+ lldb_dr3_i386,
+ lldb_dr4_i386,
+ lldb_dr5_i386,
+ lldb_dr6_i386,
+ lldb_dr7_i386,
k_num_registers_i386,
k_num_gpr_registers_i386 = k_last_gpr_i386 - k_first_gpr_i386 + 1,
enum
{
k_first_gpr_x86_64,
- gpr_rax_x86_64 = k_first_gpr_x86_64,
- gpr_rbx_x86_64,
- gpr_rcx_x86_64,
- gpr_rdx_x86_64,
- gpr_rdi_x86_64,
- gpr_rsi_x86_64,
- gpr_rbp_x86_64,
- gpr_rsp_x86_64,
- gpr_r8_x86_64,
- gpr_r9_x86_64,
- gpr_r10_x86_64,
- gpr_r11_x86_64,
- gpr_r12_x86_64,
- gpr_r13_x86_64,
- gpr_r14_x86_64,
- gpr_r15_x86_64,
- gpr_rip_x86_64,
- gpr_rflags_x86_64,
- gpr_cs_x86_64,
- gpr_fs_x86_64,
- gpr_gs_x86_64,
- gpr_ss_x86_64,
- gpr_ds_x86_64,
- gpr_es_x86_64,
+ lldb_rax_x86_64 = k_first_gpr_x86_64,
+ lldb_rbx_x86_64,
+ lldb_rcx_x86_64,
+ lldb_rdx_x86_64,
+ lldb_rdi_x86_64,
+ lldb_rsi_x86_64,
+ lldb_rbp_x86_64,
+ lldb_rsp_x86_64,
+ lldb_r8_x86_64,
+ lldb_r9_x86_64,
+ lldb_r10_x86_64,
+ lldb_r11_x86_64,
+ lldb_r12_x86_64,
+ lldb_r13_x86_64,
+ lldb_r14_x86_64,
+ lldb_r15_x86_64,
+ lldb_rip_x86_64,
+ lldb_rflags_x86_64,
+ lldb_cs_x86_64,
+ lldb_fs_x86_64,
+ lldb_gs_x86_64,
+ lldb_ss_x86_64,
+ lldb_ds_x86_64,
+ lldb_es_x86_64,
k_first_alias_x86_64,
- gpr_eax_x86_64 = k_first_alias_x86_64,
- gpr_ebx_x86_64,
- gpr_ecx_x86_64,
- gpr_edx_x86_64,
- gpr_edi_x86_64,
- gpr_esi_x86_64,
- gpr_ebp_x86_64,
- gpr_esp_x86_64,
- gpr_r8d_x86_64, // Low 32 bits of r8
- gpr_r9d_x86_64, // Low 32 bits of r9
- gpr_r10d_x86_64, // Low 32 bits of r10
- gpr_r11d_x86_64, // Low 32 bits of r11
- gpr_r12d_x86_64, // Low 32 bits of r12
- gpr_r13d_x86_64, // Low 32 bits of r13
- gpr_r14d_x86_64, // Low 32 bits of r14
- gpr_r15d_x86_64, // Low 32 bits of r15
- gpr_ax_x86_64,
- gpr_bx_x86_64,
- gpr_cx_x86_64,
- gpr_dx_x86_64,
- gpr_di_x86_64,
- gpr_si_x86_64,
- gpr_bp_x86_64,
- gpr_sp_x86_64,
- gpr_r8w_x86_64, // Low 16 bits of r8
- gpr_r9w_x86_64, // Low 16 bits of r9
- gpr_r10w_x86_64, // Low 16 bits of r10
- gpr_r11w_x86_64, // Low 16 bits of r11
- gpr_r12w_x86_64, // Low 16 bits of r12
- gpr_r13w_x86_64, // Low 16 bits of r13
- gpr_r14w_x86_64, // Low 16 bits of r14
- gpr_r15w_x86_64, // Low 16 bits of r15
- gpr_ah_x86_64,
- gpr_bh_x86_64,
- gpr_ch_x86_64,
- gpr_dh_x86_64,
- gpr_al_x86_64,
- gpr_bl_x86_64,
- gpr_cl_x86_64,
- gpr_dl_x86_64,
- gpr_dil_x86_64,
- gpr_sil_x86_64,
- gpr_bpl_x86_64,
- gpr_spl_x86_64,
- gpr_r8l_x86_64, // Low 8 bits of r8
- gpr_r9l_x86_64, // Low 8 bits of r9
- gpr_r10l_x86_64, // Low 8 bits of r10
- gpr_r11l_x86_64, // Low 8 bits of r11
- gpr_r12l_x86_64, // Low 8 bits of r12
- gpr_r13l_x86_64, // Low 8 bits of r13
- gpr_r14l_x86_64, // Low 8 bits of r14
- gpr_r15l_x86_64, // Low 8 bits of r15
- k_last_alias_x86_64 = gpr_r15l_x86_64,
+ lldb_eax_x86_64 = k_first_alias_x86_64,
+ lldb_ebx_x86_64,
+ lldb_ecx_x86_64,
+ lldb_edx_x86_64,
+ lldb_edi_x86_64,
+ lldb_esi_x86_64,
+ lldb_ebp_x86_64,
+ lldb_esp_x86_64,
+ lldb_r8d_x86_64, // Low 32 bits of r8
+ lldb_r9d_x86_64, // Low 32 bits of r9
+ lldb_r10d_x86_64, // Low 32 bits of r10
+ lldb_r11d_x86_64, // Low 32 bits of r11
+ lldb_r12d_x86_64, // Low 32 bits of r12
+ lldb_r13d_x86_64, // Low 32 bits of r13
+ lldb_r14d_x86_64, // Low 32 bits of r14
+ lldb_r15d_x86_64, // Low 32 bits of r15
+ lldb_ax_x86_64,
+ lldb_bx_x86_64,
+ lldb_cx_x86_64,
+ lldb_dx_x86_64,
+ lldb_di_x86_64,
+ lldb_si_x86_64,
+ lldb_bp_x86_64,
+ lldb_sp_x86_64,
+ lldb_r8w_x86_64, // Low 16 bits of r8
+ lldb_r9w_x86_64, // Low 16 bits of r9
+ lldb_r10w_x86_64, // Low 16 bits of r10
+ lldb_r11w_x86_64, // Low 16 bits of r11
+ lldb_r12w_x86_64, // Low 16 bits of r12
+ lldb_r13w_x86_64, // Low 16 bits of r13
+ lldb_r14w_x86_64, // Low 16 bits of r14
+ lldb_r15w_x86_64, // Low 16 bits of r15
+ lldb_ah_x86_64,
+ lldb_bh_x86_64,
+ lldb_ch_x86_64,
+ lldb_dh_x86_64,
+ lldb_al_x86_64,
+ lldb_bl_x86_64,
+ lldb_cl_x86_64,
+ lldb_dl_x86_64,
+ lldb_dil_x86_64,
+ lldb_sil_x86_64,
+ lldb_bpl_x86_64,
+ lldb_spl_x86_64,
+ lldb_r8l_x86_64, // Low 8 bits of r8
+ lldb_r9l_x86_64, // Low 8 bits of r9
+ lldb_r10l_x86_64, // Low 8 bits of r10
+ lldb_r11l_x86_64, // Low 8 bits of r11
+ lldb_r12l_x86_64, // Low 8 bits of r12
+ lldb_r13l_x86_64, // Low 8 bits of r13
+ lldb_r14l_x86_64, // Low 8 bits of r14
+ lldb_r15l_x86_64, // Low 8 bits of r15
+ k_last_alias_x86_64 = lldb_r15l_x86_64,
k_last_gpr_x86_64 = k_last_alias_x86_64,
k_first_fpr_x86_64,
- fpu_fctrl_x86_64 = k_first_fpr_x86_64,
- fpu_fstat_x86_64,
- fpu_ftag_x86_64,
- fpu_fop_x86_64,
- fpu_fiseg_x86_64,
- fpu_fioff_x86_64,
- fpu_foseg_x86_64,
- fpu_fooff_x86_64,
- fpu_mxcsr_x86_64,
- fpu_mxcsrmask_x86_64,
- fpu_st0_x86_64,
- fpu_st1_x86_64,
- fpu_st2_x86_64,
- fpu_st3_x86_64,
- fpu_st4_x86_64,
- fpu_st5_x86_64,
- fpu_st6_x86_64,
- fpu_st7_x86_64,
- fpu_mm0_x86_64,
- fpu_mm1_x86_64,
- fpu_mm2_x86_64,
- fpu_mm3_x86_64,
- fpu_mm4_x86_64,
- fpu_mm5_x86_64,
- fpu_mm6_x86_64,
- fpu_mm7_x86_64,
- fpu_xmm0_x86_64,
- fpu_xmm1_x86_64,
- fpu_xmm2_x86_64,
- fpu_xmm3_x86_64,
- fpu_xmm4_x86_64,
- fpu_xmm5_x86_64,
- fpu_xmm6_x86_64,
- fpu_xmm7_x86_64,
- fpu_xmm8_x86_64,
- fpu_xmm9_x86_64,
- fpu_xmm10_x86_64,
- fpu_xmm11_x86_64,
- fpu_xmm12_x86_64,
- fpu_xmm13_x86_64,
- fpu_xmm14_x86_64,
- fpu_xmm15_x86_64,
- k_last_fpr_x86_64 = fpu_xmm15_x86_64,
+ lldb_fctrl_x86_64 = k_first_fpr_x86_64,
+ lldb_fstat_x86_64,
+ lldb_ftag_x86_64,
+ lldb_fop_x86_64,
+ lldb_fiseg_x86_64,
+ lldb_fioff_x86_64,
+ lldb_foseg_x86_64,
+ lldb_fooff_x86_64,
+ lldb_mxcsr_x86_64,
+ lldb_mxcsrmask_x86_64,
+ lldb_st0_x86_64,
+ lldb_st1_x86_64,
+ lldb_st2_x86_64,
+ lldb_st3_x86_64,
+ lldb_st4_x86_64,
+ lldb_st5_x86_64,
+ lldb_st6_x86_64,
+ lldb_st7_x86_64,
+ lldb_mm0_x86_64,
+ lldb_mm1_x86_64,
+ lldb_mm2_x86_64,
+ lldb_mm3_x86_64,
+ lldb_mm4_x86_64,
+ lldb_mm5_x86_64,
+ lldb_mm6_x86_64,
+ lldb_mm7_x86_64,
+ lldb_xmm0_x86_64,
+ lldb_xmm1_x86_64,
+ lldb_xmm2_x86_64,
+ lldb_xmm3_x86_64,
+ lldb_xmm4_x86_64,
+ lldb_xmm5_x86_64,
+ lldb_xmm6_x86_64,
+ lldb_xmm7_x86_64,
+ lldb_xmm8_x86_64,
+ lldb_xmm9_x86_64,
+ lldb_xmm10_x86_64,
+ lldb_xmm11_x86_64,
+ lldb_xmm12_x86_64,
+ lldb_xmm13_x86_64,
+ lldb_xmm14_x86_64,
+ lldb_xmm15_x86_64,
+ k_last_fpr_x86_64 = lldb_xmm15_x86_64,
k_first_avx_x86_64,
- fpu_ymm0_x86_64 = k_first_avx_x86_64,
- fpu_ymm1_x86_64,
- fpu_ymm2_x86_64,
- fpu_ymm3_x86_64,
- fpu_ymm4_x86_64,
- fpu_ymm5_x86_64,
- fpu_ymm6_x86_64,
- fpu_ymm7_x86_64,
- fpu_ymm8_x86_64,
- fpu_ymm9_x86_64,
- fpu_ymm10_x86_64,
- fpu_ymm11_x86_64,
- fpu_ymm12_x86_64,
- fpu_ymm13_x86_64,
- fpu_ymm14_x86_64,
- fpu_ymm15_x86_64,
- k_last_avx_x86_64 = fpu_ymm15_x86_64,
+ lldb_ymm0_x86_64 = k_first_avx_x86_64,
+ lldb_ymm1_x86_64,
+ lldb_ymm2_x86_64,
+ lldb_ymm3_x86_64,
+ lldb_ymm4_x86_64,
+ lldb_ymm5_x86_64,
+ lldb_ymm6_x86_64,
+ lldb_ymm7_x86_64,
+ lldb_ymm8_x86_64,
+ lldb_ymm9_x86_64,
+ lldb_ymm10_x86_64,
+ lldb_ymm11_x86_64,
+ lldb_ymm12_x86_64,
+ lldb_ymm13_x86_64,
+ lldb_ymm14_x86_64,
+ lldb_ymm15_x86_64,
+ k_last_avx_x86_64 = lldb_ymm15_x86_64,
- dr0_x86_64,
- dr1_x86_64,
- dr2_x86_64,
- dr3_x86_64,
- dr4_x86_64,
- dr5_x86_64,
- dr6_x86_64,
- dr7_x86_64,
+ lldb_dr0_x86_64,
+ lldb_dr1_x86_64,
+ lldb_dr2_x86_64,
+ lldb_dr3_x86_64,
+ lldb_dr4_x86_64,
+ lldb_dr5_x86_64,
+ lldb_dr6_x86_64,
+ lldb_dr7_x86_64,
k_num_registers_x86_64,
k_num_gpr_registers_x86_64 = k_last_gpr_x86_64 - k_first_gpr_x86_64 + 1,
#define DEFINE_GPR32(reg, offset, generic_reg) \
{ \
#reg, nullptr, 4, offset, eEncodingUint, eFormatHexUppercase, \
- {gcc_##reg##_i386, dwarf_##reg##_i386, generic_reg, gdb_##reg##_i386, gpr_##reg##_i386 }, nullptr, nullptr \
+ {gcc_##reg##_i386, dwarf_##reg##_i386, generic_reg, gdb_##reg##_i386, lldb_##reg##_i386 }, nullptr, nullptr \
}
-#define GPR_REGNUM(reg) gpr_##reg##_i386
+#define GPR_REGNUM(reg) lldb_##reg##_i386
// For now we're only supporting general purpose registers. Unfortunately we have to maintain
// parallel arrays since that's how the RegisterContext interface expects things to be returned.
CONTEXT *context = GetSystemContext();
switch (reg_info->kinds[eRegisterKindLLDB])
{
- case gpr_eax_i386:
+ case lldb_eax_i386:
reg_value.SetUInt32(context->Eax);
break;
- case gpr_ebx_i386:
+ case lldb_ebx_i386:
reg_value.SetUInt32(context->Ebx);
break;
- case gpr_ecx_i386:
+ case lldb_ecx_i386:
reg_value.SetUInt32(context->Ecx);
break;
- case gpr_edx_i386:
+ case lldb_edx_i386:
reg_value.SetUInt32(context->Edx);
break;
- case gpr_edi_i386:
+ case lldb_edi_i386:
reg_value.SetUInt32(context->Edi);
break;
- case gpr_esi_i386:
+ case lldb_esi_i386:
reg_value.SetUInt32(context->Esi);
break;
- case gpr_ebp_i386:
+ case lldb_ebp_i386:
reg_value.SetUInt32(context->Ebp);
break;
- case gpr_esp_i386:
+ case lldb_esp_i386:
reg_value.SetUInt32(context->Esp);
break;
- case gpr_eip_i386:
+ case lldb_eip_i386:
reg_value.SetUInt32(context->Eip);
break;
- case gpr_eflags_i386:
+ case lldb_eflags_i386:
reg_value.SetUInt32(context->EFlags);
break;
}
CONTEXT *context = GetSystemContext();
switch (reg_info->kinds[eRegisterKindLLDB])
{
- case gpr_eax_i386:
+ case lldb_eax_i386:
context->Eax = reg_value.GetAsUInt32();
break;
- case gpr_ebx_i386:
+ case lldb_ebx_i386:
context->Ebx = reg_value.GetAsUInt32();
break;
- case gpr_ecx_i386:
+ case lldb_ecx_i386:
context->Ecx = reg_value.GetAsUInt32();
break;
- case gpr_edx_i386:
+ case lldb_edx_i386:
context->Edx = reg_value.GetAsUInt32();
break;
- case gpr_edi_i386:
+ case lldb_edi_i386:
context->Edi = reg_value.GetAsUInt32();
break;
- case gpr_esi_i386:
+ case lldb_esi_i386:
context->Esi = reg_value.GetAsUInt32();
break;
- case gpr_ebp_i386:
+ case lldb_ebp_i386:
context->Ebp = reg_value.GetAsUInt32();
break;
- case gpr_esp_i386:
+ case lldb_esp_i386:
context->Esp = reg_value.GetAsUInt32();
break;
- case gpr_eip_i386:
+ case lldb_eip_i386:
context->Eip = reg_value.GetAsUInt32();
break;
- case gpr_eflags_i386:
+ case lldb_eflags_i386:
context->EFlags = reg_value.GetAsUInt32();
break;
}
projects / platform / upstream / llvm.git / commitdiff