)
td_library(
- name = "Mem2RegInterfacesTdFiles",
- srcs = ["include/mlir/Interfaces/Mem2RegInterfaces.td"],
+ name = "MemorySlotInterfacesTdFiles",
+ srcs = ["include/mlir/Interfaces/MemorySlotInterfaces.td"],
includes = ["include"],
deps = [":OpBaseTdFiles"],
)
)
cc_library(
- name = "Mem2RegInterfaces",
- srcs = ["lib/Interfaces/Mem2RegInterfaces.cpp"],
- hdrs = ["include/mlir/Interfaces/Mem2RegInterfaces.h"],
+ name = "MemorySlotInterfaces",
+ srcs = ["lib/Interfaces/MemorySlotInterfaces.cpp"],
+ hdrs = ["include/mlir/Interfaces/MemorySlotInterfaces.h"],
includes = ["include"],
deps = [
":IR",
- ":Mem2RegInterfacesIncGen",
+ ":MemorySlotInterfacesIncGen",
"//llvm:Support",
],
)
":LLVMIntrinsicOpsIncGen",
":LLVMOpsIncGen",
":LLVMTypesIncGen",
- ":Mem2RegInterfaces",
- ":Mem2RegInterfacesIncGen",
+ ":MemorySlotInterfaces",
+ ":MemorySlotInterfacesIncGen",
":SideEffectInterfaces",
":Support",
"//llvm:AsmParser",
":DataLayoutInterfacesTdFiles",
":FunctionInterfacesTdFiles",
":InferTypeOpInterfaceTdFiles",
- ":Mem2RegInterfacesTdFiles",
+ ":MemorySlotInterfacesTdFiles",
":OpBaseTdFiles",
":SideEffectInterfacesTdFiles",
],
":ControlFlowInterfaces",
":IR",
":LoopLikeInterface",
- ":Mem2RegInterfaces",
+ ":MemorySlotInterfaces",
":Rewrite",
":SideEffectInterfaces",
":Support",
)
gentbl_cc_library(
- name = "Mem2RegInterfacesIncGen",
+ name = "MemorySlotInterfacesIncGen",
strip_include_prefix = "include",
tbl_outs = [
(
["-gen-op-interface-decls"],
- "include/mlir/Interfaces/Mem2RegInterfaces.h.inc",
+ "include/mlir/Interfaces/MemorySlotOpInterfaces.h.inc",
),
(
["-gen-op-interface-defs"],
- "include/mlir/Interfaces/Mem2RegInterfaces.cpp.inc",
+ "include/mlir/Interfaces/MemorySlotOpInterfaces.cpp.inc",
),
],
tblgen = ":mlir-tblgen",
- td_file = "include/mlir/Interfaces/Mem2RegInterfaces.td",
- deps = [":Mem2RegInterfacesTdFiles"],
+ td_file = "include/mlir/Interfaces/MemorySlotInterfaces.td",
+ deps = [":MemorySlotInterfacesTdFiles"],
)
gentbl_cc_library(
":ControlFlowInterfaces",
":IR",
":LoopLikeInterface",
- ":Mem2RegInterfaces",
+ ":MemorySlotInterfaces",
":Pass",
":Rewrite",
":RuntimeVerifiableOpInterface",
],
includes = ["include"],
deps = [
- ":Mem2RegInterfacesTdFiles",
+ ":MemorySlotInterfacesTdFiles",
":ArithOpsTdFiles",
":CastInterfacesTdFiles",
":ControlFlowInterfacesTdFiles",
":DialectUtils",
":IR",
":InferTypeOpInterface",
- ":Mem2RegInterfaces",
+ ":MemorySlotInterfaces",
":MemRefBaseIncGen",
":MemRefOpsIncGen",
":ShapedOpInterfaces",