* config/i386/constraints.md (Y2): Rename from Y.

        (Yi): New constraint.
        * config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
        pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
        zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
        (extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
        truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
        fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
        floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed,
        absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
        fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
        * config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
        mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
        vec_extractv2si_1): Change Y constraints to Y2.
        * config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
        vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
        Change Y constraints to Y2.
        (sse2_loadld): Change Y constraints to x.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@121660 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dd9e6f3..5daa426 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2007-02-06  Richard Henderson  <rth@redhat.com>
+
+       * config/i386/constraints.md (Y2): Rename from Y.
+       (Yi): New constraint.
+       * config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
+       pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
+       zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
+       (extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
+       truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
+       fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
+       floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed, 
+       absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
+       fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
+       * config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
+       mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
+       vec_extractv2si_1): Change Y constraints to Y2.
+       * config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
+       vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
+       Change Y constraints to Y2.
+       (sse2_loadld): Change Y constraints to x.
+
 2007-02-06  Roger Sayle  <roger@eyesopen.com>
 
        * config/rs6000/rs6000.md (popcount<mode>2): Rewrite.

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 0ab4995..f5b7c51 100644 (file)
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -83,8 +83,16 @@
 (define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
  "Any SSE register.")
 
-(define_register_constraint "Y" "TARGET_SSE2? SSE_REGS : NO_REGS"
- "@internal Any SSE2 register.")
+;; We use the Y prefix to denote any number of conditional register sets:
+;;  2  SSE2 enabled
+;;  i  SSE2 inter-unit moves enabled
+
+(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
+ "@internal Any SSE register, when SSE2 is enabled.")
+
+(define_register_constraint "Yi"
+ "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
+ "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
 
 ;; Integer constant constraints.
 (define_constraint "I"

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 92fcde9..ffb575a 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1187,9 +1187,9 @@
 
 (define_insn "*movsi_1"
   [(set (match_operand:SI 0 "nonimmediate_operand"
-                       "=r  ,m  ,*y,*y,?rm,?*y,*x,*x,?r,m ,?*Y,*x")
+                       "=r  ,m  ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Y2,*x")
        (match_operand:SI 1 "general_operand"
-                       "rinm,rin,C ,*y,*y ,rm ,C ,*x,*Y,*x,r  ,m "))]
+                       "rinm,rin,C ,*y,*y ,rm ,C ,*x,*Y2,*x,r   ,m "))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -1981,9 +1981,9 @@
 
 (define_insn "*movdi_2"
   [(set (match_operand:DI 0 "nonimmediate_operand"
-                               "=r  ,o  ,*y,m*y,*y,*Y,m ,*Y,*Y,*x,m ,*x,*x")
+                       "=r  ,o  ,*y,m*y,*y,*Y2,m  ,*Y2,*Y2,*x,m ,*x,*x")
        (match_operand:DI 1 "general_operand"
-                               "riFo,riF,C ,*y ,m ,C ,*Y,*Y,m ,C ,*x,*x,m "))]
+                       "riFo,riF,C ,*y ,m ,C  ,*Y2,*Y2,m  ,C ,*x,*x,m "))]
   "!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
    #
@@ -2437,7 +2437,7 @@
 
 (define_insn "*pushdf_nointeger"
   [(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
-       (match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y"))]
+       (match_operand:DF 1 "general_no_elim_operand" "f,Fo,*r,Y2"))]
   "!TARGET_64BIT && !TARGET_INTEGER_DFMODE_MOVES"
 {
   /* This insn should be already split before reg-stack.  */
@@ -2449,7 +2449,7 @@
 
 (define_insn "*pushdf_integer"
   [(set (match_operand:DF 0 "push_operand" "=<,<,<")
-       (match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y"))]
+       (match_operand:DF 1 "general_no_elim_operand" "f,rFo,Y2"))]
   "TARGET_64BIT || TARGET_INTEGER_DFMODE_MOVES"
 {
   /* This insn should be already split before reg-stack.  */
@@ -2489,9 +2489,9 @@
 
 (define_insn "*movdf_nointeger"
   [(set (match_operand:DF 0 "nonimmediate_operand"
-                       "=f,m,f,*r  ,o  ,Y*x,Y*x,Y*x ,m  ")
+                       "=f,m,f,*r  ,o  ,Y2*x,Y2*x,Y2*x ,m  ")
        (match_operand:DF 1 "general_operand"
-                       "fm,f,G,*roF,F*r,C  ,Y*x,mY*x,Y*x"))]
+                       "fm,f,G,*roF,F*r,C   ,Y2*x,mY2*x,Y2*x"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
    && ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
    && (reload_in_progress || reload_completed
@@ -2611,9 +2611,9 @@
 
 (define_insn "*movdf_integer"
   [(set (match_operand:DF 0 "nonimmediate_operand"
-               "=f,m,f,r  ,o ,Y*x,Y*x,Y*x,m  ")
+               "=f,m,f,r  ,o ,Y2*x,Y2*x,Y2*x,m   ")
        (match_operand:DF 1 "general_operand"
-               "fm,f,G,roF,Fr,C  ,Y*x,m  ,Y*x"))]
+               "fm,f,G,roF,Fr,C   ,Y2*x,m   ,Y2*x"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
    && ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT)
    && (reload_in_progress || reload_completed
@@ -3269,8 +3269,9 @@
   ")
 
 (define_insn "zero_extendsidi2_32"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?*o,?*y,?*Y")
-       (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "0,rm,r,rm,rm")))
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?*o,?*y,?*Y2")
+       (zero_extend:DI
+        (match_operand:SI 1 "nonimmediate_operand" "0,rm,r,rm,rm")))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT"
   "@
@@ -3283,8 +3284,9 @@
    (set_attr "type" "multi,multi,multi,mmxmov,ssemov")])
 
 (define_insn "zero_extendsidi2_rex64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*y,?*Y")
-     (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "rm,0,rm,rm")))]
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*y,?*Y2")
+     (zero_extend:DI
+       (match_operand:SI 1 "nonimmediate_operand" "rm,0,rm,rm")))]
   "TARGET_64BIT"
   "@
    mov\t{%k1, %k0|%k0, %k1}
@@ -3644,8 +3646,9 @@
 })
 
 (define_insn "*extendsfdf2_mixed"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,Y")
-        (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f,mY")))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,x")
+        (float_extend:DF
+         (match_operand:SF 1 "nonimmediate_operand" "fm,f,xm")))]
   "TARGET_SSE2 && TARGET_MIX_SSE_I387"
 {
   switch (which_alternative)
@@ -3670,8 +3673,8 @@
    (set_attr "mode" "SF,XF,DF")])
 
 (define_insn "*extendsfdf2_sse"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=Y")
-        (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=x")
+        (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
   "TARGET_SSE2 && TARGET_SSE_MATH"
   "cvtss2sd\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
@@ -3823,9 +3826,9 @@
   "")
 
 (define_insn "*truncdfsf_fast_mixed"
-  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,f,Y")
+  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,f,x")
         (float_truncate:SF
-          (match_operand:DF 1 "nonimmediate_operand" "f ,f,Ym")))]
+          (match_operand:DF 1 "nonimmediate_operand" "f ,f,xm")))]
   "TARGET_SSE2 && TARGET_MIX_SSE_I387 && flag_unsafe_math_optimizations"
 {
   switch (which_alternative)
@@ -3849,9 +3852,9 @@
 ;; Yes, this one doesn't depend on flag_unsafe_math_optimizations,
 ;; because nothing we do here is unsafe.
 (define_insn "*truncdfsf_fast_sse"
-  [(set (match_operand:SF 0 "nonimmediate_operand"   "=Y")
+  [(set (match_operand:SF 0 "nonimmediate_operand"   "=x")
         (float_truncate:SF
-          (match_operand:DF 1 "nonimmediate_operand" "Ym")))]
+          (match_operand:DF 1 "nonimmediate_operand" "xm")))]
   "TARGET_SSE2 && TARGET_SSE_MATH"
   "cvtsd2ss\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
@@ -3867,9 +3870,9 @@
    (set_attr "mode" "SF")])
 
 (define_insn "*truncdfsf_mixed"
-  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?fx*r,Y")
+  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?fx*r,Y2")
        (float_truncate:SF
-         (match_operand:DF 1 "nonimmediate_operand" "f ,f    ,Ym")))
+         (match_operand:DF 1 "nonimmediate_operand" "f ,f    ,Y2m")))
    (clobber (match_operand:SF 2 "memory_operand"     "=X,m    ,X"))]
   "TARGET_MIX_SSE_I387"
 {
@@ -4045,7 +4048,7 @@
 })
 
 (define_insn "*truncxfdf2_mixed"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r,?Y")
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?r,?Y2*x")
        (float_truncate:DF
         (match_operand:XF 1 "register_operand" "f,f,f,f")))
    (clobber (match_operand:DF 2 "memory_operand" "=X,m,m,m"))]
@@ -4205,7 +4208,7 @@
 
 (define_insn "fix_truncdfdi_sse"
   [(set (match_operand:DI 0 "register_operand" "=r,r")
-       (fix:DI (match_operand:DF 1 "nonimmediate_operand" "Y,Ym")))]
+       (fix:DI (match_operand:DF 1 "nonimmediate_operand" "x,xm")))]
   "TARGET_64BIT && TARGET_SSE2 && (!TARGET_FISTTP || TARGET_SSE_MATH)"
   "cvttsd2si{q}\t{%1, %0|%0, %1}"
   [(set_attr "type" "sseicvt")
@@ -4225,7 +4228,7 @@
 
 (define_insn "fix_truncdfsi_sse"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
-       (fix:SI (match_operand:DF 1 "nonimmediate_operand" "Y,Ym")))]
+       (fix:SI (match_operand:DF 1 "nonimmediate_operand" "x,xm")))]
   "TARGET_SSE2 && (!TARGET_FISTTP || TARGET_SSE_MATH)"
   "cvttsd2si\t{%1, %0|%0, %1}"
   [(set_attr "type" "sseicvt")
@@ -4668,7 +4671,7 @@
   "")
 
 (define_insn "*floatsidf2_mixed"
-  [(set (match_operand:DF 0 "register_operand" "=f,?f,Y,Y")
+  [(set (match_operand:DF 0 "register_operand" "=f,?f,x,x")
        (float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r,r,mr")))]
   "TARGET_SSE2 && TARGET_MIX_SSE_I387"
   "@
@@ -4684,7 +4687,7 @@
    (set_attr "fp_int_src" "true")])
 
 (define_insn "*floatsidf2_sse"
-  [(set (match_operand:DF 0 "register_operand" "=Y,Y")
+  [(set (match_operand:DF 0 "register_operand" "=x,x")
        (float:DF (match_operand:SI 1 "nonimmediate_operand" "r,mr")))]
   "TARGET_SSE2 && TARGET_SSE_MATH"
   "cvtsi2sd\t{%1, %0|%0, %1}"
@@ -4713,7 +4716,7 @@
   "")
 
 (define_insn "*floatdidf2_mixed"
-  [(set (match_operand:DF 0 "register_operand" "=f,?f,Y,Y")
+  [(set (match_operand:DF 0 "register_operand" "=f,?f,x,x")
        (float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r,r,mr")))]
   "TARGET_64BIT && TARGET_SSE2 && TARGET_MIX_SSE_I387"
   "@
@@ -4729,7 +4732,7 @@
    (set_attr "fp_int_src" "true")])
 
 (define_insn "*floatdidf2_sse"
-  [(set (match_operand:DF 0 "register_operand" "=Y,Y")
+  [(set (match_operand:DF 0 "register_operand" "=x,x")
        (float:DF (match_operand:DI 1 "nonimmediate_operand" "r,mr")))]
   "TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH"
   "cvtsi2sd{q}\t{%1, %0|%0, %1}"
@@ -9790,20 +9793,20 @@
   "ix86_expand_fp_absneg_operator (ABS, DFmode, operands); DONE;")
 
 (define_insn "*absnegdf2_mixed"
-  [(set (match_operand:DF 0 "nonimmediate_operand"    "=Y,Y,f,rm")
+  [(set (match_operand:DF 0 "nonimmediate_operand"    "=x,x,f,rm")
        (match_operator:DF 3 "absneg_operator"
-         [(match_operand:DF 1 "nonimmediate_operand" "0 ,Y,0,0")]))
-   (use (match_operand:V2DF 2 "nonimmediate_operand"  "Ym,0,X,X"))
+         [(match_operand:DF 1 "nonimmediate_operand" "0 ,x,0,0")]))
+   (use (match_operand:V2DF 2 "nonimmediate_operand"  "xm,0,X,X"))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
    && ix86_unary_operator_ok (GET_CODE (operands[3]), DFmode, operands)"
   "#")
 
 (define_insn "*absnegdf2_sse"
-  [(set (match_operand:DF 0 "nonimmediate_operand"    "=Y,Y,rm")
+  [(set (match_operand:DF 0 "nonimmediate_operand"    "=x,x,rm")
        (match_operator:DF 3 "absneg_operator"
-         [(match_operand:DF 1 "nonimmediate_operand" "0 ,Y,0 ")]))
-   (use (match_operand:V2DF 2 "nonimmediate_operand"  "Ym,0,X "))
+         [(match_operand:DF 1 "nonimmediate_operand" "0 ,x,0 ")]))
+   (use (match_operand:V2DF 2 "nonimmediate_operand"  "xm,0,X "))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_SSE2 && TARGET_SSE_MATH
    && ix86_unary_operator_ok (GET_CODE (operands[3]), DFmode, operands)"
@@ -13513,10 +13516,10 @@
    (set_attr "mode" "SF")])
 
 (define_insn "*sse_setccdf"
-  [(set (match_operand:DF 0 "register_operand" "=Y")
+  [(set (match_operand:DF 0 "register_operand" "=x")
        (match_operator:DF 1 "sse_comparison_operator"
          [(match_operand:DF 2 "register_operand" "0")
-          (match_operand:DF 3 "nonimmediate_operand" "Ym")]))]
+          (match_operand:DF 3 "nonimmediate_operand" "xm")]))]
   "TARGET_SSE2"
   "cmp%D1sd\t{%3, %0|%0, %3}"
   [(set_attr "type" "ssecmp")
@@ -15437,10 +15440,10 @@
    (set_attr "mode" "<MODE>")])
 
 (define_insn "*fop_df_comm_mixed"
-  [(set (match_operand:DF 0 "register_operand" "=f,Y")
+  [(set (match_operand:DF 0 "register_operand" "=f,x")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "nonimmediate_operand" "%0,0")
-                        (match_operand:DF 2 "nonimmediate_operand" "fm,Ym")]))]
+         [(match_operand:DF 1 "nonimmediate_operand" "%0,0")
+          (match_operand:DF 2 "nonimmediate_operand" "fm,xm")]))]
   "TARGET_SSE2 && TARGET_MIX_SSE_I387
    && COMMUTATIVE_ARITH_P (operands[3])
    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
@@ -15456,10 +15459,10 @@
    (set_attr "mode" "DF")])
 
 (define_insn "*fop_df_comm_sse"
-  [(set (match_operand:DF 0 "register_operand" "=Y")
+  [(set (match_operand:DF 0 "register_operand" "=x")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "nonimmediate_operand" "%0")
-                        (match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
+         [(match_operand:DF 1 "nonimmediate_operand" "%0")
+          (match_operand:DF 2 "nonimmediate_operand" "xm")]))]
   "TARGET_SSE2 && TARGET_SSE_MATH
    && COMMUTATIVE_ARITH_P (operands[3])
    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
@@ -15486,10 +15489,10 @@
    (set_attr "mode" "DF")])
 
 (define_insn "*fop_df_1_mixed"
-  [(set (match_operand:DF 0 "register_operand" "=f,f,Y")
+  [(set (match_operand:DF 0 "register_operand" "=f,f,x")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
-                        (match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym")]))]
+         [(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
+          (match_operand:DF 2 "nonimmediate_operand" "fm,0,xm")]))]
   "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
    && !COMMUTATIVE_ARITH_P (operands[3])
    && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
@@ -15512,10 +15515,10 @@
    (set_attr "mode" "DF")])
 
 (define_insn "*fop_df_1_sse"
-  [(set (match_operand:DF 0 "register_operand" "=Y")
+  [(set (match_operand:DF 0 "register_operand" "=x")
        (match_operator:DF 3 "binary_fp_operator"
-                       [(match_operand:DF 1 "register_operand" "0")
-                        (match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
+         [(match_operand:DF 1 "register_operand" "0")
+          (match_operand:DF 2 "nonimmediate_operand" "xm")]))]
   "TARGET_SSE2 && TARGET_SSE_MATH
    && !COMMUTATIVE_ARITH_P (operands[3])"
   "* return output_387_binary_op (insn, operands);"

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 4c5ebbc..3766d08 100644 (file)
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -64,9 +64,9 @@
 
 (define_insn "*mov<mode>_internal_rex64"
   [(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
-                               "=rm,r,*y,*y ,m ,*y,Y ,x,x ,m,r,x")
+                               "=rm,r,*y,*y ,m ,*y,Y2,x,x ,m,r,x")
        (match_operand:MMXMODEI 1 "vector_move_operand"
-                               "Cr ,m,C ,*ym,*y,Y ,*y,C,xm,x,x,r"))]
+                               "Cr ,m,C ,*ym,*y,Y2,*y,C,xm,x,x,r"))]
   "TARGET_64BIT && TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -88,9 +88,9 @@
 
 (define_insn "*mov<mode>_internal"
   [(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
-                       "=*y,*y ,m ,*y,*Y,*Y,*Y ,m ,*x,*x,*x,m ,?r ,?m")
+                       "=*y,*y ,m ,*y ,*Y2,*Y2,*Y2 ,m  ,*x,*x,*x,m ,?r ,?m")
        (match_operand:MMXMODEI 1 "vector_move_operand"
-                       "C  ,*ym,*y,*Y,*y,C ,*Ym,*Y,C ,*x,m ,*x,irm,r"))]
+                       "C  ,*ym,*y,*Y2,*y ,C  ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
   "TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -123,9 +123,9 @@
 
 (define_insn "*movv2sf_internal_rex64"
   [(set (match_operand:V2SF 0 "nonimmediate_operand"
-                               "=rm,r,*y ,*y ,m ,*y,Y ,x,x,x,m,r,x")
+                               "=rm,r,*y ,*y ,m ,*y,Y2,x,x,x,m,r,x")
         (match_operand:V2SF 1 "vector_move_operand"
-                               "Cr ,m ,C ,*ym,*y,Y ,*y,C,x,m,x,x,r"))]
+                               "Cr ,m ,C ,*ym,*y,Y2,*y,C,x,m,x,x,r"))]
   "TARGET_64BIT && TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -148,9 +148,9 @@
 
 (define_insn "*movv2sf_internal"
   [(set (match_operand:V2SF 0 "nonimmediate_operand"
-                                       "=*y,*y ,m,*y,*Y,*x,*x,*x,m ,?r ,?m")
+                       "=*y,*y ,m,*y ,*Y2,*x,*x,*x,m ,?r ,?m")
         (match_operand:V2SF 1 "vector_move_operand"
-                                       "C ,*ym,*y,*Y,*y,C ,*x,m ,*x,irm,r"))]
+                       "C ,*ym,*y,*Y2,*y ,C ,*x,m ,*x,irm,r"))]
   "TARGET_MMX
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
@@ -1172,9 +1172,9 @@
 })
 
 (define_insn "*vec_extractv2si_1"
-  [(set (match_operand:SI 0 "nonimmediate_operand"     "=y,Y,Y,x,frxy")
+  [(set (match_operand:SI 0 "nonimmediate_operand"     "=y,Y2,Y2,x,frxy")
        (vec_select:SI
-         (match_operand:V2SI 1 "nonimmediate_operand" " 0,0,Y,0,o")
+         (match_operand:V2SI 1 "nonimmediate_operand" " 0,0 ,Y2,0,o")
          (parallel [(const_int 1)])))]
   "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 1bb099e..50abb8a 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1327,7 +1327,7 @@
 })
 
 (define_insn "*vec_setv4sf_0"
-  [(set (match_operand:V4SF 0 "nonimmediate_operand"  "=x,x,Y ,m")
+  [(set (match_operand:V4SF 0 "nonimmediate_operand"  "=x,x,Y2,m")
        (vec_merge:V4SF
          (vec_duplicate:V4SF
            (match_operand:SF 2 "general_operand"     " x,m,*r,x*rfF"))
@@ -2445,10 +2445,10 @@
    (set_attr "mode" "DF")])
 
 (define_insn "*vec_concatv2df"
-  [(set (match_operand:V2DF 0 "register_operand"     "=Y,Y,Y,x,x")
+  [(set (match_operand:V2DF 0 "register_operand"     "=Y2,Y2,Y2,x,x")
        (vec_concat:V2DF
-         (match_operand:DF 1 "nonimmediate_operand" " 0,0,m,0,0")
-         (match_operand:DF 2 "vector_move_operand"  " Y,m,C,x,m")))]
+         (match_operand:DF 1 "nonimmediate_operand" " 0 ,0 ,m ,0,0")
+         (match_operand:DF 2 "vector_move_operand"  " Y2,m ,C ,x,m")))]
   "TARGET_SSE"
   "@
    unpcklpd\t{%2, %0|%0, %2}
@@ -3961,11 +3961,11 @@
   "operands[2] = CONST0_RTX (V4SImode);")
 
 (define_insn "sse2_loadld"
-  [(set (match_operand:V4SI 0 "register_operand"       "=Y,x,x")
+  [(set (match_operand:V4SI 0 "register_operand"       "=Y2,x,x")
        (vec_merge:V4SI
          (vec_duplicate:V4SI
-           (match_operand:SI 2 "nonimmediate_operand" "mr,m,x"))
-         (match_operand:V4SI 1 "reg_or_0_operand"     " C,C,0")
+           (match_operand:SI 2 "nonimmediate_operand" "mr ,m,x"))
+         (match_operand:V4SI 1 "reg_or_0_operand"     " C ,C,0")
          (const_int 1)))]
   "TARGET_SSE"
   "@
@@ -4048,9 +4048,9 @@
    (set_attr "mode" "V2SF,V4SF,V2SF")])
 
 (define_insn "*vec_dupv4si"
-  [(set (match_operand:V4SI 0 "register_operand" "=Y,x")
+  [(set (match_operand:V4SI 0 "register_operand" "=Y2,x")
        (vec_duplicate:V4SI
-         (match_operand:SI 1 "register_operand" " Y,0")))]
+         (match_operand:SI 1 "register_operand" " Y2,0")))]
   "TARGET_SSE"
   "@
    pshufd\t{$0, %1, %0|%0, %1, 0}
@@ -4059,9 +4059,9 @@
    (set_attr "mode" "TI,V4SF")])
 
 (define_insn "*vec_dupv2di"
-  [(set (match_operand:V2DI 0 "register_operand" "=Y,x")
+  [(set (match_operand:V2DI 0 "register_operand" "=Y2,x")
        (vec_duplicate:V2DI
-         (match_operand:DI 1 "register_operand" " 0,0")))]
+         (match_operand:DI 1 "register_operand" " 0 ,0")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t%0, %0
@@ -4073,10 +4073,10 @@
 ;; nonimmediate_operand for operand 2 and *not* allowing memory for the SSE
 ;; alternatives pretty much forces the MMX alternative to be chosen.
 (define_insn "*sse2_concatv2si"
-  [(set (match_operand:V2SI 0 "register_operand"     "=Y, Y,*y,*y")
+  [(set (match_operand:V2SI 0 "register_operand"     "=Y2, Y2,*y,*y")
        (vec_concat:V2SI
-         (match_operand:SI 1 "nonimmediate_operand" " 0,rm, 0,rm")
-         (match_operand:SI 2 "reg_or_0_operand"     " Y, C,*y, C")))]
+         (match_operand:SI 1 "nonimmediate_operand" " 0 ,rm , 0,rm")
+         (match_operand:SI 2 "reg_or_0_operand"     " Y2,C  ,*y, C")))]
   "TARGET_SSE2"
   "@
    punpckldq\t{%2, %0|%0, %2}
@@ -4101,10 +4101,10 @@
    (set_attr "mode" "V4SF,V4SF,DI,DI")])
 
 (define_insn "*vec_concatv4si_1"
-  [(set (match_operand:V4SI 0 "register_operand"       "=Y,x,x")
+  [(set (match_operand:V4SI 0 "register_operand"       "=Y2,x,x")
        (vec_concat:V4SI
-         (match_operand:V2SI 1 "register_operand"     " 0,0,0")
-         (match_operand:V2SI 2 "nonimmediate_operand" " Y,x,m")))]
+         (match_operand:V2SI 1 "register_operand"     " 0 ,0,0")
+         (match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,m")))]
   "TARGET_SSE"
   "@
    punpcklqdq\t{%2, %0|%0, %2}
@@ -4114,10 +4114,10 @@
    (set_attr "mode" "TI,V4SF,V2SF")])
 
 (define_insn "*vec_concatv2di"
-  [(set (match_operand:V2DI 0 "register_operand"     "=Y,?Y,Y,x,x,x")
+  [(set (match_operand:V2DI 0 "register_operand"     "=Y2,?Y2,Y2,x,x,x")
        (vec_concat:V2DI
-         (match_operand:DI 1 "nonimmediate_operand" " m,*y,0,0,0,m")
-         (match_operand:DI 2 "vector_move_operand"  " C, C,Y,x,m,0")))]
+         (match_operand:DI 1 "nonimmediate_operand" "  m,*y ,0 ,0,0,m")
+         (match_operand:DI 2 "vector_move_operand"  "  C,  C,Y2,x,m,0")))]
   "TARGET_SSE"
   "@
    movq\t{%1, %0|%0, %1}