drm/vc4: Fix pitch setup for T-format scanout. 11/148511/2
authorEric Anholt <eric@anholt.net>
Sat, 15 Jul 2017 00:33:08 +0000 (17:33 -0700)
committerInki Dae <inki.dae@samsung.com>
Fri, 8 Sep 2017 05:05:25 +0000 (14:05 +0900)
The documentation said to use src_w here, and I didn't consider that
we actually needed to be using pitch somewhere in our setup.  Fixes
scanout on my DSI panel when X11 does initial setup with 1920x1080
HDMI and 800x480 DSI both at 0,0 of the same framebuffer.

Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: 98830d91da08 ("drm/vc4: Add T-format scanout support.")
[inki.dae: apply from rpi3-4.9.y]
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Change-Id: Iad1f4838785a0956542cc54d88fdc96dade5e66c

drivers/gpu/drm/vc4/vc4_plane.c

index 1335c6948599e21dcaa5f7f5774ad64daa8f5778..22ed883559feaba920cb5bd64a98689a100caf9b 100644 (file)
@@ -547,14 +547,24 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
                tiling = SCALER_CTL0_TILING_LINEAR;
                pitch0 = VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH);
                break;
-       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
+
+       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: {
+               /* For T-tiled, the FB pitch is "how many bytes from
+                * one row to the next, such that pitch * tile_h ==
+                * tile_size * tiles_per_row."
+                */
+               u32 tile_size_shift = 12;
+               u32 tile_h_shift = 5;
+               u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
+
                tiling = SCALER_CTL0_TILING_256B_OR_T;
 
-               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET),
-                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L),
-                         VC4_SET_FIELD((vc4_state->src_w[0] + 31) >> 5,
-                                       SCALER_PITCH0_TILE_WIDTH_R));
+               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET) |
+                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L) |
+                         VC4_SET_FIELD(tiles_w, SCALER_PITCH0_TILE_WIDTH_R));
                break;
+       }
+
        default:
                DRM_DEBUG_KMS("Unsupported FB tiling flag 0x%16llx",
                              (long long)fb->modifier[0]);