MIPS: Loongson64: Use three arguments for slti
authorNathan Chancellor <nathan@kernel.org>
Wed, 8 Dec 2021 16:56:17 +0000 (09:56 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 10:05:01 +0000 (11:05 +0100)
[ Upstream commit f2c6c22fa83ab2577619009057b3ebcb5305bb03 ]

LLVM's integrated assembler does not support 'slti <reg>, <imm>':

<instantiation>:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:86:2: note: while in macro instantiation
 kernel_entry_setup # cpu specific setup
 ^
<instantiation>:16:12: error: invalid operand for instruction
 slti $12, (0x6300 | 0x0008)
           ^
arch/mips/kernel/head.S:150:2: note: while in macro instantiation
 smp_slave_setup
 ^

To increase compatibility with LLVM's integrated assembler, use the full
form of 'slti <reg>, <reg>, <imm>', which matches the rest of
arch/mips/. This does not result in any change for GNU as.

Link: https://github.com/ClangBuiltLinux/linux/issues/1526
Reported-by: Ryutaroh Matsumoto <ryutaroh@ict.e.titech.ac.jp>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h

index 13373c5..efb41b3 100644 (file)
@@ -32,7 +32,7 @@
        nop
        /* Loongson-3A R2/R3 */
        andi    t0, (PRID_IMP_MASK | PRID_REV_MASK)
-       slti    t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
+       slti    t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
        bnez    t0, 2f
        nop
 1:
@@ -63,7 +63,7 @@
        nop
        /* Loongson-3A R2/R3 */
        andi    t0, (PRID_IMP_MASK | PRID_REV_MASK)
-       slti    t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
+       slti    t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
        bnez    t0, 2f
        nop
 1: