intel/compiler: add setup_imm_(u)b helpers
authorIago Toral Quiroga <itoral@igalia.com>
Fri, 27 Jul 2018 11:38:38 +0000 (13:38 +0200)
committerIago Toral Quiroga <itoral@igalia.com>
Wed, 1 Aug 2018 06:08:15 +0000 (08:08 +0200)
The hardware doesn't support byte immediates, so similar to setup_imm_df()
for doubles, these helpers work by loading the constant value into a
VGRF.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/compiler/brw_fs.h
src/intel/compiler/brw_fs_nir.cpp

index 8ccd165..d56e337 100644 (file)
@@ -540,6 +540,12 @@ fs_reg shuffle_for_32bit_write(const brw::fs_builder &bld,
 fs_reg setup_imm_df(const brw::fs_builder &bld,
                     double v);
 
+fs_reg setup_imm_b(const brw::fs_builder &bld,
+                   int8_t v);
+
+fs_reg setup_imm_ub(const brw::fs_builder &bld,
+                   uint8_t v);
+
 enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode,
                                                nir_intrinsic_op op);
 
index a41dc2a..2c8595b 100644 (file)
@@ -5396,3 +5396,19 @@ setup_imm_df(const fs_builder &bld, double v)
 
    return component(retype(tmp, BRW_REGISTER_TYPE_DF), 0);
 }
+
+fs_reg
+setup_imm_b(const fs_builder &bld, int8_t v)
+{
+   const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_B);
+   bld.MOV(tmp, brw_imm_w(v));
+   return tmp;
+}
+
+fs_reg
+setup_imm_ub(const fs_builder &bld, uint8_t v)
+{
+   const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UB);
+   bld.MOV(tmp, brw_imm_uw(v));
+   return tmp;
+}