re PR rtl-optimization/79593 (Poor/Worse code generation for FPU on versions after 6)

	PR rtl-optimization/79593
	* config/i386/i386.md (reg = mem; mem = reg): New define_peephole2.

From-SVN: r267740

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3ef7718..10f8e13 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
 2019-01-08  Jakub Jelinek  <jakub@redhat.com>
 
+       PR rtl-optimization/79593
+       * config/i386/i386.md (reg = mem; mem = reg): New define_peephole2.
+
        * config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize
        UNSPEC_FUSION_GPR to its argument.  Formatting fixes.
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c8123cb..83124cc 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18740,6 +18740,18 @@
                       const0_rtx);
 })
 
+;; Attempt to optimize away memory stores of values the memory already
+;; has.  See PR79593.
+(define_peephole2
+  [(set (match_operand 0 "register_operand")
+        (match_operand 1 "memory_operand"))
+   (set (match_operand 2 "memory_operand") (match_dup 0))]
+  "!MEM_VOLATILE_P (operands[1])
+   && !MEM_VOLATILE_P (operands[2])
+   && rtx_equal_p (operands[1], operands[2])
+   && !reg_overlap_mentioned_p (operands[0], operands[2])"
+  [(set (match_dup 0) (match_dup 1))])
+
 ;; Attempt to always use XOR for zeroing registers (including FP modes).
 (define_peephole2
   [(set (match_operand 0 "general_reg_operand")