arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU
authorJordan Crouse <jcrouse@codeaurora.org>
Mon, 9 Nov 2020 18:47:28 +0000 (11:47 -0700)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 10 Nov 2020 18:06:11 +0000 (12:06 -0600)
Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
split pagetables and per-instance pagetables for drm/msm.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201109184728.2463097-5-jcrouse@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
arch/arm64/boot/dts/qcom/sdm845.dtsi

index 64fc1bf..39f23cd 100644 (file)
@@ -633,6 +633,15 @@ ap_ts_i2c: &i2c14 {
        status = "okay";
 };
 
+/*
+ * Cheza fw does not properly program the GPU aperture to allow the
+ * GPU to update the SMMU pagetables for context switches.  Work
+ * around this by dropping the "qcom,adreno-smmu" compat string.
+ */
+&adreno_smmu {
+       compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
+};
+
 &mss_pil {
        iommus = <&apps_smmu 0x781 0x0>,
                 <&apps_smmu 0x724 0x3>;
index aca7e9c..895e703 100644 (file)
                };
 
                adreno_smmu: iommu@5040000 {
-                       compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
+                       compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";
                        reg = <0 0x5040000 0 0x10000>;
                        #iommu-cells = <1>;
                        #global-interrupts = <2>;