arm: bcmbca: add bcm63148 SoC support

BCM63148 is an Broadcom B15 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.

This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.

The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.

Signed-off-by: William Zhang <william.zhang@broadcom.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 5252765..63d408b 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -218,6 +218,7 @@ F:  arch/arm/mach-bcmbca/
 F:     board/broadcom/bcmbca/
 N:     bcmbca
 N:     bcm[9]?47622
+N:     bcm[9]?63148
 N:     bcm[9]?63178
 N:     bcm[9]?6756
 N:     bcm[9]?6846

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2545575..6960946 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
 
 dtb-$(CONFIG_BCM47622) += \
        bcm947622.dtb
+dtb-$(CONFIG_BCM63148) += \
+       bcm963148.dtb
 dtb-$(CONFIG_BCM63178) += \
        bcm963178.dtb
 dtb-$(CONFIG_BCM6756) += \

diff --git a/arch/arm/dts/bcm63148.dtsi b/arch/arm/dts/bcm63148.dtsi
new file mode 100644 (file)
index 0000000..df5307b
--- /dev/null
+++ b/arch/arm/dts/bcm63148.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       compatible = "brcm,bcm63148", "brcm,bcmbca";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       interrupt-parent = <&gic>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               B15_0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b15";
+                       reg = <0x0>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               B15_1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "brcm,brahma-b15";
+                       reg = <0x1>;
+                       next-level-cache = <&L2_0>;
+                       enable-method = "psci";
+               };
+
+               L2_0: l2-cache0 {
+                       compatible = "cache";
+               };
+       };
+
+       timer {
+               compatible = "arm,armv7-timer";
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+                       <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+       };
+
+       pmu: pmu {
+               compatible = "arm,cortex-a15-pmu";
+               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&B15_0>, <&B15_1>;
+       };
+
+       clocks: clocks {
+               periph_clk: periph-clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <50000000>;
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       axi@80030000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0x80030000 0x8000>;
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,cortex-a15-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x1000 0x1000>,
+                               <0x2000 0x2000>,
+                               <0x4000 0x2000>,
+                               <0x6000 0x2000>;
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+                                       IRQ_TYPE_LEVEL_HIGH)>;
+               };
+       };
+
+       bus@ff800000 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0 0xfffe8000 0x8000>;
+
+               uart0: serial@600 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x600 0x20>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&periph_clk>;
+                       clock-names = "refclk";
+                       status = "disabled";
+               };
+       };
+};

diff --git a/arch/arm/dts/bcm963148.dts b/arch/arm/dts/bcm963148.dts
new file mode 100644 (file)
index 0000000..98f6a6d
--- /dev/null
+++ b/arch/arm/dts/bcm963148.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63148.dtsi"
+
+/ {
+       model = "Broadcom BCM963148 Reference Board";
+       compatible = "brcm,bcm963148", "brcm,bcm63148", "brcm,bcmbca";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x08000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};

diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index f310411..9a29c41 100644 (file)
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -12,6 +12,13 @@ config BCM47622
        select DM_SERIAL
        select PL01X_SERIAL
 
+config BCM63148
+       bool "Support for Broadcom 63148 Family"
+       select SYS_ARCH_TIMER
+       select CPU_V7A
+       select DM_SERIAL
+       select BCM6345_SERIAL
+
 config BCM63178
        bool "Support for Broadcom 63178 Family"
        select SYS_ARCH_TIMER
@@ -41,6 +48,7 @@ config BCM6878
        select PL01X_SERIAL
 
 source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
+source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
 source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
 source "arch/arm/mach-bcmbca/bcm6846/Kconfig"

diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index 5eb483c..8a22f9a 100644 (file)
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -4,6 +4,7 @@
 #
 
 obj-$(CONFIG_BCM47622) += bcm47622/
+obj-$(CONFIG_BCM63148) += bcm63148/
 obj-$(CONFIG_BCM63178) += bcm63178/
 obj-$(CONFIG_BCM6756) += bcm6756/
 obj-$(CONFIG_BCM6846) += bcm6846/

diff --git a/arch/arm/mach-bcmbca/bcm63148/Kconfig b/arch/arm/mach-bcmbca/bcm63148/Kconfig
new file mode 100644 (file)
index 0000000..f81504c
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63148/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM63148
+
+config TARGET_BCM963148
+       bool "Broadcom 63148 Reference Board"
+       depends on ARCH_BCMBCA
+
+config SYS_SOC
+       default "bcm63148"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif

diff --git a/arch/arm/mach-bcmbca/bcm63148/Makefile b/arch/arm/mach-bcmbca/bcm63148/Makefile
new file mode 100644 (file)
index 0000000..beb979a
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63148/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj- += dummy.o

diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 89c02cf..d070eba 100644 (file)
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -16,6 +16,13 @@ config SYS_CONFIG_NAME
 
 endif
 
+if TARGET_BCM963148
+
+config SYS_CONFIG_NAME
+       default "bcm963148"
+
+endif
+
 if TARGET_BCM963178
 
 config SYS_CONFIG_NAME

diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig
new file mode 100644 (file)
index 0000000..6ddb45c
--- /dev/null
+++ b/configs/bcm963148_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM63148=y
+CONFIG_TARGET_BCM963148=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="bcm963148"
+CONFIG_IDENT_STRING=" Broadcom BCM63148"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y

diff --git a/include/configs/bcm963148.h b/include/configs/bcm963148.h
new file mode 100644 (file)
index 0000000..5a24ccc
--- /dev/null
+++ b/include/configs/bcm963148.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM963148_H
+#define __BCM963148_H
+
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+
+#endif