return false;
}
- if (!VPTState::isValid(RDA))
+ if (!VPTState::isValid(RDA)) {
+ LLVM_DEBUG(dbgs() << "ARM Loops: Invalid VPT state.\n");
return false;
+ }
if (!ValidateLiveOuts()) {
LLVM_DEBUG(dbgs() << "ARM Loops: Invalid live outs.\n");
// instructions in the preheader.
auto CannotInsertWDLSTPBetween = [](MachineBasicBlock::iterator I,
MachineBasicBlock::iterator E) {
- for (; I != E; ++I)
- if (shouldInspect(*I))
+ for (; I != E; ++I) {
+ if (shouldInspect(*I)) {
+ LLVM_DEBUG(dbgs() << "ARM Loops: Instruction blocks [W|D]LSTP"
+ << " insertion: " << *I);
return true;
+ }
+ }
return false;
};
continue;
if (isSubImmOpcode(MI->getOpcode())) {
- if (FoundSub || !IsValidSub(MI, ExpectedVectorWidth))
+ if (FoundSub || !IsValidSub(MI, ExpectedVectorWidth)) {
+ LLVM_DEBUG(dbgs() << "ARM Loops: Unexpected instruction in element"
+ " count: " << *MI);
return false;
+ }
FoundSub = true;
- } else
+ } else {
+ LLVM_DEBUG(dbgs() << "ARM Loops: Unexpected instruction in element"
+ " count: " << *MI);
return false;
+ }
}
ToRemove.insert(ElementChain.begin(), ElementChain.end());
}
Revert = true;
return;
}
-
TryAdjustInsertionPoint(StartInsertPt, Start, RDA);
+ LLVM_DEBUG(if (StartInsertPt == StartInsertBB->end())
+ dbgs() << "ARM Loops: Will insert LoopStart at end of block\n";
+ else
+ dbgs() << "ARM Loops: Will insert LoopStart at "
+ << *StartInsertPt
+ );
+
Revert = !ValidateRanges(Start, End, BBUtils, ML);
CannotTailPredicate = !ValidateTailPredicate();
}