intel/fs: fix per vertex input clamping

Only apply the clamp in multi patch mode (where the input vertices
vary between [1, 32]).

The clamp NIR pass operates on lowered intrinsics so we need to call
it after the inputs have been lowered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e25e17dd0c ("intel/fs: clamp per vertex input accesses to patchControlPoints")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8912
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22701>

diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index d0dcaff..90591af 100644 (file)
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -365,8 +365,6 @@ brw_compile_tcs(const struct brw_compiler *compiler,
    const bool debug_enabled = INTEL_DEBUG(DEBUG_TCS);
    const unsigned *assembly;
 
-   brw_nir_clamp_per_vertex_loads(nir, key->input_vertices);
-
    vue_prog_data->base.stage = MESA_SHADER_TESS_CTRL;
    prog_data->base.base.ray_queries = nir->info.ray_queries;
    prog_data->base.base.total_scratch = 0;
@@ -387,6 +385,8 @@ brw_compile_tcs(const struct brw_compiler *compiler,
                              key->_tes_primitive_mode);
    if (key->quads_workaround)
       brw_nir_apply_tcs_quads_workaround(nir);
+   if (compiler->use_tcs_multi_patch)
+      brw_nir_clamp_per_vertex_loads(nir, key->input_vertices);
 
    brw_postprocess_nir(nir, compiler, is_scalar, debug_enabled,
                        key->base.robust_buffer_access);