Dump the display port register on Ironlake.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
#define ADPA_HSYNC_ACTIVE_HIGH (1<<3)
#define ADPA_HSYNC_ACTIVE_LOW 0
+#define PCH_eDP_A 0x64000
+#define PCH_DP_B 0xe4100
+#define PCH_DP_C 0xe4200
+#define PCH_DP_D 0xe4300
#define DVOA 0x61120
#define DVOB 0x61140
DEFINEREG(HDMIC),
DEFINEREG(HDMID),
DEFINEREG2(PCH_LVDS, i830_debug_lvds),
+ DEFINEREG(PCH_eDP_A),
+ DEFINEREG(PCH_DP_B),
+ DEFINEREG(PCH_DP_C),
+ DEFINEREG(PCH_DP_D),
};
static void