objtool: Rework allocating stack_ops on decode
authorPeter Zijlstra <peterz@infradead.org>
Thu, 23 Apr 2020 11:22:10 +0000 (13:22 +0200)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 30 Apr 2020 18:14:32 +0000 (20:14 +0200)
Wrap each stack_op in a macro that allocates and adds it to the list.
This simplifies trying to figure out what to do with the pre-allocated
stack_op at the end.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Reviewed-by: Miroslav Benes <mbenes@suse.cz>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lkml.kernel.org/r/20200428191659.736151601@infradead.org
tools/objtool/arch/x86/decode.c

index c45a0b4..97e66c7 100644 (file)
@@ -77,6 +77,11 @@ unsigned long arch_jump_destination(struct instruction *insn)
        return insn->offset + insn->len + insn->immediate;
 }
 
+#define ADD_OP(op) \
+       if (!(op = calloc(1, sizeof(*op)))) \
+               return -1; \
+       else for (list_add_tail(&op->list, ops_list); op; op = NULL)
+
 int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                            unsigned long offset, unsigned int maxlen,
                            unsigned int *len, enum insn_type *type,
@@ -88,7 +93,7 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        unsigned char op1, op2, rex = 0, rex_b = 0, rex_r = 0, rex_w = 0,
                      rex_x = 0, modrm = 0, modrm_mod = 0, modrm_rm = 0,
                      modrm_reg = 0, sib = 0;
-       struct stack_op *op;
+       struct stack_op *op = NULL;
 
        x86_64 = is_x86_64(elf);
        if (x86_64 == -1)
@@ -129,10 +134,6 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        if (insn.sib.nbytes)
                sib = insn.sib.bytes[0];
 
-       op = calloc(1, sizeof(*op));
-       if (!op)
-               return -1;
-
        switch (op1) {
 
        case 0x1:
@@ -141,10 +142,12 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* add/sub reg, %rsp */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_ADD;
-                       op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_ADD;
+                               op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
                }
                break;
 
@@ -152,9 +155,11 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                /* push reg */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_REG;
-               op->src.reg = op_to_cfi_reg[op1 & 0x7][rex_b];
-               op->dest.type = OP_DEST_PUSH;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_REG;
+                       op->src.reg = op_to_cfi_reg[op1 & 0x7][rex_b];
+                       op->dest.type = OP_DEST_PUSH;
+               }
 
                break;
 
@@ -162,9 +167,11 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                /* pop reg */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_POP;
-               op->dest.type = OP_DEST_REG;
-               op->dest.reg = op_to_cfi_reg[op1 & 0x7][rex_b];
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_POP;
+                       op->dest.type = OP_DEST_REG;
+                       op->dest.reg = op_to_cfi_reg[op1 & 0x7][rex_b];
+               }
 
                break;
 
@@ -172,8 +179,10 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        case 0x6a:
                /* push immediate */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_CONST;
-               op->dest.type = OP_DEST_PUSH;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_CONST;
+                       op->dest.type = OP_DEST_PUSH;
+               }
                break;
 
        case 0x70 ... 0x7f:
@@ -188,11 +197,13 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                if (modrm == 0xe4) {
                        /* and imm, %rsp */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_AND;
-                       op->src.reg = CFI_SP;
-                       op->src.offset = insn.immediate.value;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_AND;
+                               op->src.reg = CFI_SP;
+                               op->src.offset = insn.immediate.value;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
                        break;
                }
 
@@ -205,11 +216,13 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                /* add/sub imm, %rsp */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_ADD;
-               op->src.reg = CFI_SP;
-               op->src.offset = insn.immediate.value * sign;
-               op->dest.type = OP_DEST_REG;
-               op->dest.reg = CFI_SP;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_ADD;
+                       op->src.reg = CFI_SP;
+                       op->src.offset = insn.immediate.value * sign;
+                       op->dest.type = OP_DEST_REG;
+                       op->dest.reg = CFI_SP;
+               }
                break;
 
        case 0x89:
@@ -217,10 +230,12 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* mov %rsp, reg */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG;
-                       op->src.reg = CFI_SP;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = op_to_cfi_reg[modrm_rm][rex_b];
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG;
+                               op->src.reg = CFI_SP;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = op_to_cfi_reg[modrm_rm][rex_b];
+                       }
                        break;
                }
 
@@ -228,10 +243,12 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* mov reg, %rsp */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG;
-                       op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG;
+                               op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
                        break;
                }
 
@@ -242,21 +259,25 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* mov reg, disp(%rbp) */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG;
-                       op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
-                       op->dest.type = OP_DEST_REG_INDIRECT;
-                       op->dest.reg = CFI_BP;
-                       op->dest.offset = insn.displacement.value;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG;
+                               op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                               op->dest.type = OP_DEST_REG_INDIRECT;
+                               op->dest.reg = CFI_BP;
+                               op->dest.offset = insn.displacement.value;
+                       }
 
                } else if (rex_w && !rex_b && modrm_rm == 4 && sib == 0x24) {
 
                        /* mov reg, disp(%rsp) */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG;
-                       op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
-                       op->dest.type = OP_DEST_REG_INDIRECT;
-                       op->dest.reg = CFI_SP;
-                       op->dest.offset = insn.displacement.value;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG;
+                               op->src.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                               op->dest.type = OP_DEST_REG_INDIRECT;
+                               op->dest.reg = CFI_SP;
+                               op->dest.offset = insn.displacement.value;
+                       }
                }
 
                break;
@@ -266,22 +287,26 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* mov disp(%rbp), reg */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG_INDIRECT;
-                       op->src.reg = CFI_BP;
-                       op->src.offset = insn.displacement.value;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG_INDIRECT;
+                               op->src.reg = CFI_BP;
+                               op->src.offset = insn.displacement.value;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                       }
 
                } else if (rex_w && !rex_b && sib == 0x24 &&
                           modrm_mod != 3 && modrm_rm == 4) {
 
                        /* mov disp(%rsp), reg */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_REG_INDIRECT;
-                       op->src.reg = CFI_SP;
-                       op->src.offset = insn.displacement.value;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_REG_INDIRECT;
+                               op->src.reg = CFI_SP;
+                               op->src.offset = insn.displacement.value;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
+                       }
                }
 
                break;
@@ -290,27 +315,31 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                if (sib == 0x24 && rex_w && !rex_b && !rex_x) {
 
                        *type = INSN_STACK;
-                       if (!insn.displacement.value) {
-                               /* lea (%rsp), reg */
-                               op->src.type = OP_SRC_REG;
-                       } else {
-                               /* lea disp(%rsp), reg */
-                               op->src.type = OP_SRC_ADD;
-                               op->src.offset = insn.displacement.value;
+                       ADD_OP(op) {
+                               if (!insn.displacement.value) {
+                                       /* lea (%rsp), reg */
+                                       op->src.type = OP_SRC_REG;
+                               } else {
+                                       /* lea disp(%rsp), reg */
+                                       op->src.type = OP_SRC_ADD;
+                                       op->src.offset = insn.displacement.value;
+                               }
+                               op->src.reg = CFI_SP;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
                        }
-                       op->src.reg = CFI_SP;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = op_to_cfi_reg[modrm_reg][rex_r];
 
                } else if (rex == 0x48 && modrm == 0x65) {
 
                        /* lea disp(%rbp), %rsp */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_ADD;
-                       op->src.reg = CFI_BP;
-                       op->src.offset = insn.displacement.value;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_ADD;
+                               op->src.reg = CFI_BP;
+                               op->src.offset = insn.displacement.value;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
 
                } else if (rex == 0x49 && modrm == 0x62 &&
                           insn.displacement.value == -8) {
@@ -322,11 +351,13 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                         * stack realignment.
                         */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_ADD;
-                       op->src.reg = CFI_R10;
-                       op->src.offset = -8;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_ADD;
+                               op->src.reg = CFI_R10;
+                               op->src.offset = -8;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
 
                } else if (rex == 0x49 && modrm == 0x65 &&
                           insn.displacement.value == -16) {
@@ -338,11 +369,13 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                         * stack realignment.
                         */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_ADD;
-                       op->src.reg = CFI_R13;
-                       op->src.offset = -16;
-                       op->dest.type = OP_DEST_REG;
-                       op->dest.reg = CFI_SP;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_ADD;
+                               op->src.reg = CFI_R13;
+                               op->src.offset = -16;
+                               op->dest.type = OP_DEST_REG;
+                               op->dest.reg = CFI_SP;
+                       }
                }
 
                break;
@@ -350,8 +383,10 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        case 0x8f:
                /* pop to mem */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_POP;
-               op->dest.type = OP_DEST_MEM;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_POP;
+                       op->dest.type = OP_DEST_MEM;
+               }
                break;
 
        case 0x90:
@@ -361,15 +396,19 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        case 0x9c:
                /* pushf */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_CONST;
-               op->dest.type = OP_DEST_PUSHF;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_CONST;
+                       op->dest.type = OP_DEST_PUSHF;
+               }
                break;
 
        case 0x9d:
                /* popf */
                *type = INSN_STACK;
-               op->src.type = OP_SRC_POPF;
-               op->dest.type = OP_DEST_MEM;
+               ADD_OP(op) {
+                       op->src.type = OP_SRC_POPF;
+                       op->dest.type = OP_DEST_MEM;
+               }
                break;
 
        case 0x0f:
@@ -405,15 +444,19 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* push fs/gs */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_CONST;
-                       op->dest.type = OP_DEST_PUSH;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_CONST;
+                               op->dest.type = OP_DEST_PUSH;
+                       }
 
                } else if (op2 == 0xa1 || op2 == 0xa9) {
 
                        /* pop fs/gs */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_POP;
-                       op->dest.type = OP_DEST_MEM;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_POP;
+                               op->dest.type = OP_DEST_MEM;
+                       }
                }
 
                break;
@@ -427,7 +470,8 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
                 * pop bp
                 */
                *type = INSN_STACK;
-               op->dest.type = OP_DEST_LEAVE;
+               ADD_OP(op)
+                       op->dest.type = OP_DEST_LEAVE;
 
                break;
 
@@ -449,12 +493,14 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
        case 0xcf: /* iret */
                *type = INSN_EXCEPTION_RETURN;
 
-               /* add $40, %rsp */
-               op->src.type = OP_SRC_ADD;
-               op->src.reg = CFI_SP;
-               op->src.offset = 5*8;
-               op->dest.type = OP_DEST_REG;
-               op->dest.reg = CFI_SP;
+               ADD_OP(op) {
+                       /* add $40, %rsp */
+                       op->src.type = OP_SRC_ADD;
+                       op->src.reg = CFI_SP;
+                       op->src.offset = 5*8;
+                       op->dest.type = OP_DEST_REG;
+                       op->dest.reg = CFI_SP;
+               }
                break;
 
        case 0xca: /* retf */
@@ -492,8 +538,10 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
                        /* push from mem */
                        *type = INSN_STACK;
-                       op->src.type = OP_SRC_CONST;
-                       op->dest.type = OP_DEST_PUSH;
+                       ADD_OP(op) {
+                               op->src.type = OP_SRC_CONST;
+                               op->dest.type = OP_DEST_PUSH;
+                       }
                }
 
                break;
@@ -504,11 +552,6 @@ int arch_decode_instruction(const struct elf *elf, const struct section *sec,
 
        *immediate = insn.immediate.nbytes ? insn.immediate.value : 0;
 
-       if (*type == INSN_STACK || *type == INSN_EXCEPTION_RETURN)
-               list_add_tail(&op->list, ops_list);
-       else
-               free(op);
-
        return 0;
 }