clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes

Currently clocksource framework doesn't support the clocks with variable
frequency. Since MIPS GIC timer ticks rate might be unstable on some
platforms, we must make sure that it justifies the clocksource
requirements. MIPS GIC timer is incremented with the CPU cluster reference
clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate
changes synchronously. Due to this the clocksource subsystem can't rely on
the timer to measure system clocks anymore. This commit marks the MIPS GIC
based clocksource as unstable if reference clock (normally it's a CPU
reference clocks) rate changes. The clocksource will execute a watchdog
thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a
new stable one.

Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS
GIC clocksource since normally the timer is stable. The only reason why
it gets unstable is due to the ref clock rate change, which event we
detect here in the driver by means of the clocks event notifier.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-rtc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200521204818.25436-9-Sergey.Semin@baikalelectronics.ru

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c82400273b0a17286a5f96104044abe3d7bf23a7..91418381fcd417459f1f7ff438cb027aac03f3db 100644 (file)
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -570,6 +570,7 @@ config CLKSRC_VERSATILE
 config CLKSRC_MIPS_GIC
        bool
        depends on MIPS_GIC
+       select CLOCKSOURCE_WATCHDOG
        select TIMER_OF
 
 config CLKSRC_TANGO_XTAL

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index ef12c12c243274efb685c18c47e2ebc32349dfa9..be4175f415ba562c4f4f3596a8bed2f144a84ac6 100644 (file)
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -24,6 +24,9 @@
 static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
 static int gic_timer_irq;
 static unsigned int gic_frequency;
+static bool __read_mostly gic_clock_unstable;
+
+static void gic_clocksource_unstable(char *reason);
 
 static u64 notrace gic_read_count_2x32(void)
 {
@@ -125,8 +128,10 @@ static int gic_clk_notifier(struct notifier_block *nb, unsigned long action,
 {
        struct clk_notifier_data *cnd = data;
 
-       if (action == POST_RATE_CHANGE)
+       if (action == POST_RATE_CHANGE) {
+               gic_clocksource_unstable("ref clock rate change");
                on_each_cpu(gic_update_frequency, (void *)cnd->new_rate, 1);
+       }
 
        return NOTIFY_OK;
 }
@@ -172,6 +177,18 @@ static struct clocksource gic_clocksource = {
        .vdso_clock_mode        = VDSO_CLOCKMODE_GIC,
 };
 
+static void gic_clocksource_unstable(char *reason)
+{
+       if (gic_clock_unstable)
+               return;
+
+       gic_clock_unstable = true;
+
+       pr_info("GIC timer is unstable due to %s\n", reason);
+
+       clocksource_mark_unstable(&gic_clocksource);
+}
+
 static int __init __gic_clocksource_init(void)
 {
        unsigned int count_width;