[amdgpu] Compilation fix for Release
authorBogdan Graur <bgraur@google.com>
Thu, 17 Sep 2020 16:04:21 +0000 (18:04 +0200)
committerBenjamin Kramer <benny.kra@googlemail.com>
Thu, 17 Sep 2020 16:04:53 +0000 (18:04 +0200)
Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D87838

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

index b446ac3..aa90f53 100644 (file)
@@ -11536,6 +11536,7 @@ static void lowerSGPRToVGPRCopy(MachineFunction &MF, MachineRegisterInfo &MRI,
       auto DstReg = MI.getOperand(0).getReg();
       auto MIB = BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(Opcode), DstReg)
                      .add(MI.getOperand(1));
+      (void)MIB;
       LLVM_DEBUG(dbgs() << "        to: " << *MIB.getInstr());
       MI.eraseFromParent();
     }