Pull ARM64 fixes from Catalin Marinas:
- Page table fixes (PROT_NONE, shareability attribute, TLB
invalidation)
- Secondary CPUs entry endianness fix
- Make NR_CPUS default to 8
* tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
arm64: mm: Fix PMD_SECT_PROT_NONE definition
arm64: Fix memory shareability attribute for ioremap_wc/cache
arm64: kernel: add code to set cpu boot mode to secondary_entry shim
arm64: make default NR_CPUS 8
arm64: ensure completion of TLB invalidatation