verdin-imx8mm: spl: switch to pca9450 pmic
authorMax Krummenacher <max.krummenacher@toradex.com>
Wed, 28 Oct 2020 09:58:12 +0000 (11:58 +0200)
committerStefano Babic <sbabic@denx.de>
Sun, 6 Dec 2020 14:31:37 +0000 (15:31 +0100)
V1.1A HW switched the PMIC from BD71837 to PCA9450.

- Disable combined DVS in PCA9450_BUCK123_DVS.
- Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM.
- Configure WDOG_B behaviour.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
board/toradex/verdin-imx8mm/spl.c
configs/verdin-imx8mm_defconfig

index cc78c56..9562cde 100644 (file)
 #include <dm/uclass.h>
 #include <dm/uclass-internal.h>
 #include <hang.h>
+#include <i2c.h>
 #include <power/bd71837.h>
+#include <power/pca9450.h>
 #include <power/pmic.h>
 #include <spl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define I2C_PMIC_BUS_ID        1
+
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
        switch (boot_dev_spl) {
@@ -101,33 +105,27 @@ int power_init_board(void)
        struct udevice *dev;
        int ret;
 
-       ret = pmic_get("pmic@4b", &dev);
-       if (ret == -ENODEV) {
-               puts("No pmic\n");
-               return 0;
-       }
-       if (ret != 0)
-               return ret;
+       if (IS_ENABLED(CONFIG_SPL_DM_PMIC_PCA9450)) {
+               ret = pmic_get("pmic", &dev);
+               if (ret == -ENODEV) {
+                       puts("No pmic found\n");
+                       return ret;
+               }
 
-       /* decrease RESET key long push time from the default 10s to 10ms */
-       pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
+               if (ret != 0)
+                       return ret;
 
-       /* unlock the PMIC regs */
-       pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
+               /* BUCKxOUT_DVS0/1 control BUCK123 output, clear PRESET_EN */
+               pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
-       /* increase VDD_SOC to typical value 0.85v before first DRAM access */
-       pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
+               /* increase VDD_DRAM to 0.975v for 1.5Ghz DDR */
+               pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);
 
-       /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
-       pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
+               /* set WDOG_B_CFG to cold reset */
+               pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 
-#ifndef CONFIG_IMX8M_LPDDR4
-       /* increase NVCC_DRAM_1V2 to 1.2v for DDR4 */
-       pmic_reg_write(dev, BD718XX_4TH_NODVS_BUCK_VOLT, 0x28);
-#endif
-
-       /* lock the PMIC regs */
-       pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
+               return 0;
+       }
 
        return 0;
 }
index 836c6f6..ea0b597 100644 (file)
@@ -90,7 +90,7 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
 CONFIG_DM_PMIC=y
-CONFIG_SPL_DM_PMIC_BD71837=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
 CONFIG_DM_PMIC_PFUZE100=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y