net: stmmac: Print more information in DebugFS DMA Capabilities file
authorJose Abreu <Jose.Abreu@synopsys.com>
Wed, 18 Dec 2019 10:24:43 +0000 (11:24 +0100)
committerDavid S. Miller <davem@davemloft.net>
Wed, 18 Dec 2019 20:14:08 +0000 (12:14 -0800)
DMA Capabilites have grown but the DebugFS that shows this info has not
been updated. Lets add the missing information.

Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

index da80866d03716d2ec5ad1f5cdbe0a47ea0a571d1..3299f5bb02e2038b8c728fe7e9ad6b6ddaad4cf5 100644 (file)
@@ -4238,9 +4238,38 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v)
                   priv->dma_cap.number_rx_channel);
        seq_printf(seq, "\tNumber of Additional TX channel: %d\n",
                   priv->dma_cap.number_tx_channel);
+       seq_printf(seq, "\tNumber of Additional RX queues: %d\n",
+                  priv->dma_cap.number_rx_queues);
+       seq_printf(seq, "\tNumber of Additional TX queues: %d\n",
+                  priv->dma_cap.number_tx_queues);
        seq_printf(seq, "\tEnhanced descriptors: %s\n",
                   (priv->dma_cap.enh_desc) ? "Y" : "N");
-
+       seq_printf(seq, "\tTX Fifo Size: %d\n", priv->dma_cap.tx_fifo_size);
+       seq_printf(seq, "\tRX Fifo Size: %d\n", priv->dma_cap.rx_fifo_size);
+       seq_printf(seq, "\tHash Table Size: %d\n", priv->dma_cap.hash_tb_sz);
+       seq_printf(seq, "\tTSO: %s\n", priv->dma_cap.tsoen ? "Y" : "N");
+       seq_printf(seq, "\tNumber of PPS Outputs: %d\n",
+                  priv->dma_cap.pps_out_num);
+       seq_printf(seq, "\tSafety Features: %s\n",
+                  priv->dma_cap.asp ? "Y" : "N");
+       seq_printf(seq, "\tFlexible RX Parser: %s\n",
+                  priv->dma_cap.frpsel ? "Y" : "N");
+       seq_printf(seq, "\tEnhanced Addressing: %d\n",
+                  priv->dma_cap.addr64);
+       seq_printf(seq, "\tReceive Side Scaling: %s\n",
+                  priv->dma_cap.rssen ? "Y" : "N");
+       seq_printf(seq, "\tVLAN Hash Filtering: %s\n",
+                  priv->dma_cap.vlhash ? "Y" : "N");
+       seq_printf(seq, "\tSplit Header: %s\n",
+                  priv->dma_cap.sphen ? "Y" : "N");
+       seq_printf(seq, "\tVLAN TX Insertion: %s\n",
+                  priv->dma_cap.vlins ? "Y" : "N");
+       seq_printf(seq, "\tDouble VLAN: %s\n",
+                  priv->dma_cap.dvlan ? "Y" : "N");
+       seq_printf(seq, "\tNumber of L3/L4 Filters: %d\n",
+                  priv->dma_cap.l3l4fnum);
+       seq_printf(seq, "\tARP Offloading: %s\n",
+                  priv->dma_cap.arpoffsel ? "Y" : "N");
        return 0;
 }
 DEFINE_SHOW_ATTRIBUTE(stmmac_dma_cap);