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clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UART
author
Beomho Seo
<beomho.seo@samsung.com>
Fri, 10 Jun 2016 04:56:30 +0000
(13:56 +0900)
committer
Sylwester Nawrocki
<s.nawrocki@samsung.com>
Fri, 10 Jun 2016 10:15:23 +0000
(12:15 +0200)
This patch adds CLK_IGNORE_UNUSED flag for sclk_aud_uart gate
clock for uart3 operation.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5433.c
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diff --git
a/drivers/clk/samsung/clk-exynos5433.c
b/drivers/clk/samsung/clk-exynos5433.c
index
1d14d1c
..
be3658d
100644
(file)
--- a/
drivers/clk/samsung/clk-exynos5433.c
+++ b/
drivers/clk/samsung/clk-exynos5433.c
@@
-2978,7
+2978,7
@@
static const struct samsung_gate_clock aud_gate_clks[] __initconst = {
GATE(CLK_SCLK_AUD_SLIMBUS, "sclk_aud_slimbus", "div_sclk_aud_slimbus",
ENABLE_SCLK_AUD1, 4, 0, 0),
GATE(CLK_SCLK_AUD_UART, "sclk_aud_uart", "div_sclk_aud_uart",
- ENABLE_SCLK_AUD1, 3,
0
, 0),
+ ENABLE_SCLK_AUD1, 3,
CLK_IGNORE_UNUSED
, 0),
GATE(CLK_SCLK_AUD_PCM, "sclk_aud_pcm", "div_sclk_aud_pcm",
ENABLE_SCLK_AUD1, 2, 0, 0),
GATE(CLK_SCLK_I2S_BCLK, "sclk_i2s_bclk", "ioclk_i2s_bclk",