ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fri, 26 Nov 2021 07:05:18 +0000 (12:35 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 1 Dec 2021 03:32:43 +0000 (21:32 -0600)
Enable PCIe Endpoint controller on the Telit FN980 TLB board based
on Qualcomm SDX55 platform.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211126070520.28979-5-manivannan.sadhasivam@linaro.org
arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts

index e8b5327..01ac917 100644 (file)
        vdda-pll-supply = <&vreg_l4e_bb_0p875>;
 };
 
+&pcie_ep {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default
+                    &pcie_ep_wake_default>;
+};
+
 &qpic_bam {
        status = "ok";
 };
        memory-region = <&mpss_adsp_mem>;
 };
 
+&tlmm {
+       pcie_ep_clkreq_default: pcie_ep_clkreq_default {
+               mux {
+                       pins = "gpio56";
+                       function = "pcie_clkreq";
+               };
+               config {
+                       pins = "gpio56";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+       };
+
+       pcie_ep_perst_default: pcie_ep_perst_default {
+               mux {
+                       pins = "gpio57";
+                       function = "gpio";
+               };
+               config {
+                       pins = "gpio57";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       pcie_ep_wake_default: pcie_ep_wake_default {
+               mux {
+                       pins = "gpio53";
+                       function = "gpio";
+               };
+               config {
+                       pins = "gpio53";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+       };
+};
+
 &usb_hsphy {
        status = "okay";
        vdda-pll-supply = <&vreg_l4e_bb_0p875>;