drm/amd/display: Add DSC check to seamless boot validation
authorAnthony Wang <anthony1.wang@amd.com>
Mon, 5 Apr 2021 21:13:58 +0000 (17:13 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 21 Apr 2021 01:37:08 +0000 (21:37 -0400)
[Why & How]
We want to immediately fail seamless boot validation if DSC is active,
as VBIOS currently does not support DSC timings. Add a check for
the relevant flag in dc_validate_seamless_boot_timing.

Signed-off-by: Anthony Wang <anthony1.wang@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c

index 757820a..724ddce 100644 (file)
@@ -1400,6 +1400,10 @@ bool dc_validate_seamless_boot_timing(const struct dc *dc,
        if (crtc_timing->v_sync_width != hw_crtc_timing.v_sync_width)
                return false;
 
+       /* block DSC for now, as VBIOS does not currently support DSC timings */
+       if (crtc_timing->flags.DSC)
+               return false;
+
        if (dc_is_dp_signal(link->connector_signal)) {
                unsigned int pix_clk_100hz;