drm/amdgpu: add DM block for dimgrey_cavefish
authorTao Zhou <tao.zhou1@amd.com>
Sat, 10 Oct 2020 07:45:35 +0000 (15:45 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 12 Oct 2020 18:03:10 +0000 (14:03 -0400)
Add DM block support for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/nv.c

index 8758d59..f8f298b 100644 (file)
@@ -3013,6 +3013,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
+       case CHIP_DIMGREY_CAVEFISH:
 #endif
                return amdgpu_dc != 0;
 #endif
index e6bc7f0..47bd79c 100644 (file)
@@ -637,6 +637,10 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
                        amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
                if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                        amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
+#if defined(CONFIG_DRM_AMD_DC)
+                else if (amdgpu_device_has_dc_support(adev))
+                        amdgpu_device_ip_block_add(adev, &dm_ip_block);
+#endif
                amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
                amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);