pinctrl: renesas: r8a77990: Share QSPI pin group data

Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.

This reduces kernel size by 32 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/54779df96c1e0fc9ce02786cfd9f66d4cfc063f0.1640269757.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index e6a955c..df40f0b 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -2827,20 +2827,13 @@ static const unsigned int qspi0_ctrl_pins[] = {
 static const unsigned int qspi0_ctrl_mux[] = {
        QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
 };
-static const unsigned int qspi0_data2_pins[] = {
-       /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
-       RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
-};
-static const unsigned int qspi0_data2_mux[] = {
-       QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
-};
-static const unsigned int qspi0_data4_pins[] = {
+static const unsigned int qspi0_data_pins[] = {
        /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
        RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
        /* QSPI0_IO2, QSPI0_IO3 */
        RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
 };
-static const unsigned int qspi0_data4_mux[] = {
+static const unsigned int qspi0_data_mux[] = {
        QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
        QSPI0_IO2_MARK, QSPI0_IO3_MARK,
 };
@@ -2852,20 +2845,13 @@ static const unsigned int qspi1_ctrl_pins[] = {
 static const unsigned int qspi1_ctrl_mux[] = {
        QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
 };
-static const unsigned int qspi1_data2_pins[] = {
-       /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
-       RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
-};
-static const unsigned int qspi1_data2_mux[] = {
-       QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
-};
-static const unsigned int qspi1_data4_pins[] = {
+static const unsigned int qspi1_data_pins[] = {
        /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
        RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
        /* QSPI1_IO2, QSPI1_IO3 */
        RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10),
 };
-static const unsigned int qspi1_data4_mux[] = {
+static const unsigned int qspi1_data_mux[] = {
        QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
        QSPI1_IO2_MARK, QSPI1_IO3_MARK,
 };
@@ -3987,11 +3973,11 @@ static const struct {
                SH_PFC_PIN_GROUP(pwm6_a),
                SH_PFC_PIN_GROUP(pwm6_b),
                SH_PFC_PIN_GROUP(qspi0_ctrl),
-               SH_PFC_PIN_GROUP(qspi0_data2),
-               SH_PFC_PIN_GROUP(qspi0_data4),
+               BUS_DATA_PIN_GROUP(qspi0_data, 2),
+               BUS_DATA_PIN_GROUP(qspi0_data, 4),
                SH_PFC_PIN_GROUP(qspi1_ctrl),
-               SH_PFC_PIN_GROUP(qspi1_data2),
-               SH_PFC_PIN_GROUP(qspi1_data4),
+               BUS_DATA_PIN_GROUP(qspi1_data, 2),
+               BUS_DATA_PIN_GROUP(qspi1_data, 4),
                SH_PFC_PIN_GROUP(scif0_data_a),
                SH_PFC_PIN_GROUP(scif0_clk_a),
                SH_PFC_PIN_GROUP(scif0_ctrl_a),