i965: Replace 'struct brw_instruction' with 'brw_inst'.

Use this an an opportunity to clean up the formatting of some old code
(brw_ADD, for instance).

Signed-off-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index c3c8229..eda79f0 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -143,7 +143,7 @@ extern "C" {
 #define BRW_MAX_CURBE                    (32*16)
 
 struct brw_context;
-struct brw_instruction;
+struct brw_inst;
 struct brw_vs_prog_key;
 struct brw_vec4_prog_key;
 struct brw_wm_prog_key;
@@ -1577,7 +1577,7 @@ void brw_vec4_alloc_reg_set(struct intel_screen *screen);
 
 /* brw_disasm.c */
 int brw_disassemble_inst(FILE *file, struct brw_context *brw,
-                         struct brw_instruction *inst, bool is_compacted);
+                         struct brw_inst *inst, bool is_compacted);
 
 /* brw_vs.c */
 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx);

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index e0c49a9..8513c48 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -585,8 +585,7 @@ static int reg (FILE *file, unsigned _reg_file, unsigned _reg_nr)
     return err;
 }
 
-static int dest (FILE *file, struct brw_context *brw,
-                 struct brw_instruction *inst)
+static int dest (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int        err = 0;
 
@@ -643,8 +642,7 @@ static int dest (FILE *file, struct brw_context *brw,
     return 0;
 }
 
-static int dest_3src (FILE *file, struct brw_context *brw,
-                      struct brw_instruction *inst)
+static int dest_3src (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int        err = 0;
     uint32_t reg_file;
@@ -783,8 +781,7 @@ static int src_da16 (FILE *file,
     return err;
 }
 
-static int src0_3src (FILE *file, struct brw_context *brw,
-                      struct brw_instruction *inst)
+static int src0_3src (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int err = 0;
     unsigned swz = brw_inst_3src_src0_swizzle(brw, inst);
@@ -834,8 +831,7 @@ static int src0_3src (FILE *file, struct brw_context *brw,
     return err;
 }
 
-static int src1_3src (FILE *file, struct brw_context *brw,
-                      struct brw_instruction *inst)
+static int src1_3src (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int err = 0;
     unsigned swz = brw_inst_3src_src1_swizzle(brw, inst);
@@ -886,8 +882,7 @@ static int src1_3src (FILE *file, struct brw_context *brw,
 }
 
 
-static int src2_3src (FILE *file, struct brw_context *brw,
-                      struct brw_instruction *inst)
+static int src2_3src (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int err = 0;
     unsigned swz = brw_inst_3src_src2_swizzle(brw, inst);
@@ -938,7 +933,7 @@ static int src2_3src (FILE *file, struct brw_context *brw,
 }
 
 static int imm (FILE *file, struct brw_context *brw, unsigned type,
-                struct brw_instruction *inst) {
+                brw_inst *inst) {
     switch (type) {
     case BRW_HW_REG_TYPE_UD:
        format (file, "0x%08xUD", brw_inst_imm_ud(brw, inst));
@@ -967,8 +962,7 @@ static int imm (FILE *file, struct brw_context *brw, unsigned type,
     return 0;
 }
 
-static int src0 (FILE *file, struct brw_context *brw,
-                 struct brw_instruction *inst)
+static int src0 (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     if (brw_inst_src0_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE)
        return imm (file, brw, brw_inst_src0_reg_type(brw, inst), inst);
@@ -1027,8 +1021,7 @@ static int src0 (FILE *file, struct brw_context *brw,
     }
 }
 
-static int src1 (FILE *file, struct brw_context *brw,
-                 struct brw_instruction *inst)
+static int src1 (FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     if (brw_inst_src1_reg_file(brw, inst) == BRW_IMMEDIATE_VALUE)
        return imm (file, brw, brw_inst_src1_reg_type(brw, inst), inst);
@@ -1087,8 +1080,7 @@ static int src1 (FILE *file, struct brw_context *brw,
     }
 }
 
-static int qtr_ctrl(FILE *file, struct brw_context *brw,
-                    struct brw_instruction *inst)
+static int qtr_ctrl(FILE *file, struct brw_context *brw, brw_inst *inst)
 {
     int qtr_ctl = brw_inst_qtr_control(brw, inst);
     int exec_size = 1 << brw_inst_exec_size(brw, inst);
@@ -1118,8 +1110,8 @@ static int qtr_ctrl(FILE *file, struct brw_context *brw,
 }
 
 int
-brw_disassemble_inst(FILE *file, struct brw_context *brw,
-                     struct brw_instruction *inst, bool is_compacted)
+brw_disassemble_inst(FILE *file, struct brw_context *brw, brw_inst *inst,
+                     bool is_compacted)
 {
     int        err = 0;
     int space = 0;

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 621def8..5a92cd7 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -171,7 +171,7 @@ void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
 void brw_push_insn_state( struct brw_compile *p )
 {
    assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]);
-   memcpy(p->current+1, p->current, sizeof(struct brw_instruction));
+   memcpy(p->current + 1, p->current, sizeof(brw_inst));
    p->compressed_stack[p->current - p->stack] = p->compressed;
    p->current++;
 }
@@ -198,7 +198,7 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
     * until out of memory.
     */
    p->store_size = 1024;
-   p->store = rzalloc_array(mem_ctx, struct brw_instruction, p->store_size);
+   p->store = rzalloc_array(mem_ctx, brw_inst, p->store_size);
    p->nr_insn = 0;
    p->current = p->stack;
    p->compressed = false;
@@ -240,8 +240,8 @@ brw_disassemble(struct brw_context *brw,
    bool dump_hex = false;
 
    for (int offset = start; offset < end;) {
-      struct brw_instruction *insn = assembly + offset;
-      struct brw_instruction uncompacted;
+      brw_inst *insn = assembly + offset;
+      brw_inst uncompacted;
       bool compacted = brw_inst_cmpt_control(brw, insn);
       fprintf(out, "0x%08x: ", offset);
 

diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 3bb12c8..23a2389 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -54,7 +54,7 @@ extern "C" {
 #define brw_last_inst (&p->store[p->nr_insn - 1])
 
 struct brw_compile {
-   struct brw_instruction *store;
+   brw_inst *store;
    int store_size;
    unsigned nr_insn;
    unsigned int next_insn_offset;
@@ -63,9 +63,9 @@ struct brw_compile {
 
    /* Allow clients to push/pop instruction state:
     */
-   struct brw_instruction stack[BRW_EU_MAX_INSN_STACK];
+   brw_inst stack[BRW_EU_MAX_INSN_STACK];
    bool compressed_stack[BRW_EU_MAX_INSN_STACK];
-   struct brw_instruction *current;
+   brw_inst *current;
 
    bool single_program_flow;
    bool compressed;
@@ -114,11 +114,9 @@ void brw_disassemble(struct brw_context *brw, void *assembly,
                      int start, int end, FILE *out);
 const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz );
 
-struct brw_instruction *brw_next_insn(struct brw_compile *p, unsigned opcode);
-void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn,
-                 struct brw_reg dest);
-void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn,
-                 struct brw_reg reg);
+brw_inst *brw_next_insn(struct brw_compile *p, unsigned opcode);
+void brw_set_dest(struct brw_compile *p, brw_inst *insn, struct brw_reg dest);
+void brw_set_src0(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
 
 void gen6_resolve_implied_move(struct brw_compile *p,
                               struct brw_reg *src,
@@ -126,22 +124,22 @@ void gen6_resolve_implied_move(struct brw_compile *p,
 
 /* Helpers for regular instructions:
  */
-#define ALU1(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
-             struct brw_reg dest,                      \
+#define ALU1(OP)                               \
+brw_inst *brw_##OP(struct brw_compile *p,      \
+             struct brw_reg dest,              \
              struct brw_reg src0);
 
-#define ALU2(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
-             struct brw_reg dest,                      \
-             struct brw_reg src0,                      \
+#define ALU2(OP)                               \
+brw_inst *brw_##OP(struct brw_compile *p,      \
+             struct brw_reg dest,              \
+             struct brw_reg src0,              \
              struct brw_reg src1);
 
-#define ALU3(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
-             struct brw_reg dest,                      \
-             struct brw_reg src0,                      \
-             struct brw_reg src1,                      \
+#define ALU3(OP)                               \
+brw_inst *brw_##OP(struct brw_compile *p,      \
+             struct brw_reg dest,              \
+             struct brw_reg src0,              \
+             struct brw_reg src1,              \
              struct brw_reg src2);
 
 #define ROUND(OP) \
@@ -197,7 +195,7 @@ ROUND(RNDE)
 /* Helpers for SEND instruction:
  */
 void brw_set_sampler_message(struct brw_compile *p,
-                             struct brw_instruction *insn,
+                             brw_inst *insn,
                              unsigned binding_table_index,
                              unsigned sampler,
                              unsigned msg_type,
@@ -208,7 +206,7 @@ void brw_set_sampler_message(struct brw_compile *p,
                              unsigned return_format);
 
 void brw_set_dp_read_message(struct brw_compile *p,
-                            struct brw_instruction *insn,
+                            brw_inst *insn,
                             unsigned binding_table_index,
                             unsigned msg_control,
                             unsigned msg_type,
@@ -218,7 +216,7 @@ void brw_set_dp_read_message(struct brw_compile *p,
                             unsigned response_length);
 
 void brw_set_dp_write_message(struct brw_compile *p,
-                             struct brw_instruction *insn,
+                             brw_inst *insn,
                              unsigned binding_table_index,
                              unsigned msg_control,
                              unsigned msg_type,
@@ -321,32 +319,30 @@ void brw_shader_time_add(struct brw_compile *p,
 /* If/else/endif.  Works by manipulating the execution flags on each
  * channel.
  */
-struct brw_instruction *brw_IF(struct brw_compile *p,
-                              unsigned execute_size);
-struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional,
-                               struct brw_reg src0, struct brw_reg src1);
+brw_inst *brw_IF(struct brw_compile *p, unsigned execute_size);
+brw_inst *gen6_IF(struct brw_compile *p, uint32_t conditional,
+                  struct brw_reg src0, struct brw_reg src1);
 
 void brw_ELSE(struct brw_compile *p);
 void brw_ENDIF(struct brw_compile *p);
 
 /* DO/WHILE loops:
  */
-struct brw_instruction *brw_DO(struct brw_compile *p,
-                              unsigned execute_size);
+brw_inst *brw_DO(struct brw_compile *p, unsigned execute_size);
 
-struct brw_instruction *brw_WHILE(struct brw_compile *p);
+brw_inst *brw_WHILE(struct brw_compile *p);
 
-struct brw_instruction *brw_BREAK(struct brw_compile *p);
-struct brw_instruction *brw_CONT(struct brw_compile *p);
-struct brw_instruction *gen6_CONT(struct brw_compile *p);
-struct brw_instruction *gen6_HALT(struct brw_compile *p);
+brw_inst *brw_BREAK(struct brw_compile *p);
+brw_inst *brw_CONT(struct brw_compile *p);
+brw_inst *gen6_CONT(struct brw_compile *p);
+brw_inst *gen6_HALT(struct brw_compile *p);
 
 /* Forward jumps:
  */
 void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx);
 
-struct brw_instruction *brw_JMPI(struct brw_compile *p, struct brw_reg index,
-                                 unsigned predicate_control);
+brw_inst *brw_JMPI(struct brw_compile *p, struct brw_reg index,
+                   unsigned predicate_control);
 
 void brw_NOP(struct brw_compile *p);
 
@@ -404,9 +400,7 @@ void brw_math_invert( struct brw_compile *p,
                      struct brw_reg dst,
                      struct brw_reg src);
 
-void brw_set_src1(struct brw_compile *p,
-                 struct brw_instruction *insn,
-                 struct brw_reg reg);
+void brw_set_src1(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
 
 void brw_set_uip_jip(struct brw_compile *p);
 
@@ -416,22 +410,19 @@ uint32_t brw_swap_cmod(uint32_t cmod);
 void brw_init_compaction_tables(struct brw_context *brw);
 void brw_compact_instructions(struct brw_compile *p, int start_offset,
                               int num_annotations, struct annotation *annotation);
-void brw_uncompact_instruction(struct brw_context *brw,
-                              struct brw_instruction *dst,
+void brw_uncompact_instruction(struct brw_context *brw, brw_inst *dst,
                               struct brw_compact_instruction *src);
 bool brw_try_compact_instruction(struct brw_compile *p,
                                  struct brw_compact_instruction *dst,
-                                 struct brw_instruction *src);
+                                 brw_inst *src);
 
-void brw_debug_compact_uncompact(struct brw_context *brw,
-                                struct brw_instruction *orig,
-                                struct brw_instruction *uncompacted);
+void brw_debug_compact_uncompact(struct brw_context *brw, brw_inst *orig,
+                                 brw_inst *uncompacted);
 
 static inline int
 next_offset(const struct brw_context *brw, void *store, int offset)
 {
-   struct brw_instruction *insn =
-      (struct brw_instruction *)((char *)store + offset);
+   brw_inst *insn = (brw_inst *)((char *)store + offset);
 
    if (brw_inst_cmpt_control(brw, insn))
       return offset + 8;

diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 24fc840..ecae345 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -329,7 +329,7 @@ static const uint16_t *src_index_table;
 static bool
 set_control_index(struct brw_context *brw,
                   struct brw_compact_instruction *dst,
-                  struct brw_instruction *src)
+                  brw_inst *src)
 {
    uint32_t uncompacted =                  /* 17b/SNB; 19b/IVB+ */
       (brw_inst_bits(src, 31, 31) << 16) | /* 1b */
@@ -354,7 +354,7 @@ set_control_index(struct brw_context *brw,
 static bool
 set_datatype_index(struct brw_context *brw,
                    struct brw_compact_instruction *dst,
-                   struct brw_instruction *src)
+                   brw_inst *src)
 {
    uint32_t uncompacted =                  /* 18b */
       (brw_inst_bits(src, 63, 61) << 15) | /* 3b */
@@ -373,8 +373,7 @@ set_datatype_index(struct brw_context *brw,
 static bool
 set_subreg_index(struct brw_context *brw,
                  struct brw_compact_instruction *dst,
-                 struct brw_instruction *src,
-                 bool is_immediate)
+                 brw_inst *src, bool is_immediate)
 {
    uint16_t uncompacted =                 /* 15b */
       (brw_inst_bits(src, 52, 48) << 0) | /*  5b */
@@ -410,7 +409,7 @@ get_src_index(uint16_t uncompacted,
 static bool
 set_src0_index(struct brw_context *brw,
                struct brw_compact_instruction *dst,
-               struct brw_instruction *src)
+               brw_inst *src)
 {
    uint16_t compacted;
    uint16_t uncompacted = brw_inst_bits(src, 88, 77); /* 12b */
@@ -427,7 +426,7 @@ set_src0_index(struct brw_context *brw,
 static bool
 set_src1_index(struct brw_context *brw,
                struct brw_compact_instruction *dst,
-               struct brw_instruction *src, bool is_immediate)
+               brw_inst *src, bool is_immediate)
 {
    if (is_immediate) {
       dst->dw1.src1_index = (brw_inst_imm_ud(brw, src) >> 8) & 0x1f;
@@ -469,7 +468,7 @@ is_compactable_immediate(unsigned imm)
 bool
 brw_try_compact_instruction(struct brw_compile *p,
                             struct brw_compact_instruction *dst,
-                            struct brw_instruction *src)
+                            brw_inst *src)
 {
    struct brw_context *brw = p->brw;
    struct brw_compact_instruction temp;
@@ -526,8 +525,7 @@ brw_try_compact_instruction(struct brw_compile *p,
 }
 
 static void
-set_uncompacted_control(struct brw_context *brw,
-                        struct brw_instruction *dst,
+set_uncompacted_control(struct brw_context *brw, brw_inst *dst,
                         struct brw_compact_instruction *src)
 {
    uint32_t uncompacted = control_index_table[src->dw0.control_index];
@@ -540,8 +538,7 @@ set_uncompacted_control(struct brw_context *brw,
 }
 
 static void
-set_uncompacted_datatype(struct brw_context *brw,
-                         struct brw_instruction *dst,
+set_uncompacted_datatype(struct brw_context *brw, brw_inst *dst,
                          struct brw_compact_instruction *src)
 {
    uint32_t uncompacted = datatype_table[src->dw0.data_type_index];
@@ -551,8 +548,7 @@ set_uncompacted_datatype(struct brw_context *brw,
 }
 
 static void
-set_uncompacted_subreg(struct brw_context *brw,
-                       struct brw_instruction *dst,
+set_uncompacted_subreg(struct brw_context *brw, brw_inst *dst,
                        struct brw_compact_instruction *src)
 {
    uint16_t uncompacted = subreg_table[src->dw0.sub_reg_index];
@@ -563,8 +559,7 @@ set_uncompacted_subreg(struct brw_context *brw,
 }
 
 static void
-set_uncompacted_src0(struct brw_context *brw,
-                     struct brw_instruction *dst,
+set_uncompacted_src0(struct brw_context *brw, brw_inst *dst,
                      struct brw_compact_instruction *src)
 {
    uint32_t compacted = src->dw0.src0_index | src->dw1.src0_index << 2;
@@ -574,8 +569,7 @@ set_uncompacted_src0(struct brw_context *brw,
 }
 
 static void
-set_uncompacted_src1(struct brw_context *brw,
-                     struct brw_instruction *dst,
+set_uncompacted_src1(struct brw_context *brw, brw_inst *dst,
                      struct brw_compact_instruction *src, bool is_immediate)
 {
    if (is_immediate) {
@@ -590,8 +584,7 @@ set_uncompacted_src1(struct brw_context *brw,
 }
 
 void
-brw_uncompact_instruction(struct brw_context *brw,
-                          struct brw_instruction *dst,
+brw_uncompact_instruction(struct brw_context *brw, brw_inst *dst,
                           struct brw_compact_instruction *src)
 {
    memset(dst, 0, sizeof(*dst));
@@ -624,8 +617,8 @@ brw_uncompact_instruction(struct brw_context *brw,
 }
 
 void brw_debug_compact_uncompact(struct brw_context *brw,
-                                 struct brw_instruction *orig,
-                                 struct brw_instruction *uncompacted)
+                                 brw_inst *orig,
+                                 brw_inst *uncompacted)
 {
    fprintf(stderr, "Instruction compact/uncompact changed (gen%d):\n",
            brw->gen);
@@ -660,7 +653,7 @@ compacted_between(int old_ip, int old_target_ip, int *compacted_counts)
 }
 
 static void
-update_uip_jip(struct brw_context *brw, struct brw_instruction *insn,
+update_uip_jip(struct brw_context *brw, brw_inst *insn,
                int this_old_ip, int *compacted_counts)
 {
    int jip = brw_inst_jip(brw, insn);
@@ -724,20 +717,20 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
    int offset = 0;
    int compacted_count = 0;
    for (src_offset = 0; src_offset < p->next_insn_offset - start_offset;) {
-      struct brw_instruction *src = store + src_offset;
+      brw_inst *src = store + src_offset;
       void *dst = store + offset;
 
       old_ip[offset / 8] = src_offset / 8;
       compacted_counts[src_offset / 8] = compacted_count;
 
-      struct brw_instruction saved = *src;
+      brw_inst saved = *src;
 
       if (!brw_inst_cmpt_control(brw, src) &&
           brw_try_compact_instruction(p, dst, src)) {
          compacted_count++;
 
          if (INTEL_DEBUG) {
-            struct brw_instruction uncompacted;
+            brw_inst uncompacted;
             brw_uncompact_instruction(brw, &uncompacted, dst);
             if (memcmp(&saved, &uncompacted, sizeof(uncompacted))) {
                brw_debug_compact_uncompact(brw, &saved, &uncompacted);
@@ -779,7 +772,7 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
    /* Fix up control flow offsets. */
    p->next_insn_offset = start_offset + offset;
    for (offset = 0; offset < p->next_insn_offset - start_offset;) {
-      struct brw_instruction *insn = store + offset;
+      brw_inst *insn = store + offset;
       int this_old_ip = old_ip[offset / 8];
       int this_compacted_count = compacted_counts[this_old_ip];
       int target_old_ip, target_compacted_count;

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 45eab29..6f6e842 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -41,7 +41,7 @@
  */
 
 static void guess_execution_size(struct brw_compile *p,
-                                struct brw_instruction *insn,
+                                brw_inst *insn,
                                 struct brw_reg reg)
 {
    const struct brw_context *brw = p->brw;
@@ -160,8 +160,7 @@ brw_reg_type_to_hw_type(const struct brw_context *brw,
 }
 
 void
-brw_set_dest(struct brw_compile *p, struct brw_instruction *inst,
-            struct brw_reg dest)
+brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
 {
    const struct brw_context *brw = p->brw;
 
@@ -225,8 +224,7 @@ brw_set_dest(struct brw_compile *p, struct brw_instruction *inst,
 extern int reg_type_size[];
 
 static void
-validate_reg(const struct brw_context *brw,
-             struct brw_instruction *inst, struct brw_reg reg)
+validate_reg(const struct brw_context *brw, brw_inst *inst, struct brw_reg reg)
 {
    int hstride_for_reg[] = {0, 1, 2, 4};
    int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256};
@@ -312,8 +310,7 @@ is_compactable_immediate(unsigned imm)
 }
 
 void
-brw_set_src0(struct brw_compile *p, struct brw_instruction *inst,
-            struct brw_reg reg)
+brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
 {
    struct brw_context *brw = p->brw;
 
@@ -453,9 +450,7 @@ brw_set_src0(struct brw_compile *p, struct brw_instruction *inst,
 
 
 void
-brw_set_src1(struct brw_compile *p,
-             struct brw_instruction *inst,
-             struct brw_reg reg)
+brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
 {
    const struct brw_context *brw = p->brw;
    assert(reg.file != BRW_MESSAGE_REGISTER_FILE);
@@ -535,7 +530,7 @@ brw_set_src1(struct brw_compile *p,
  */
 static void
 brw_set_message_descriptor(struct brw_compile *p,
-                          struct brw_instruction *inst,
+                          brw_inst *inst,
                           enum brw_message_target sfid,
                           unsigned msg_length,
                           unsigned response_length,
@@ -556,7 +551,7 @@ brw_set_message_descriptor(struct brw_compile *p,
 }
 
 static void brw_set_math_message( struct brw_compile *p,
-                                 struct brw_instruction *inst,
+                                 brw_inst *inst,
                                  unsigned function,
                                  unsigned integer_type,
                                  bool low_precision,
@@ -603,7 +598,7 @@ static void brw_set_math_message( struct brw_compile *p,
 
 
 static void brw_set_ff_sync_message(struct brw_compile *p,
-                                   struct brw_instruction *insn,
+                                   brw_inst *insn,
                                    bool allocate,
                                    unsigned response_length,
                                    bool end_of_thread)
@@ -622,7 +617,7 @@ static void brw_set_ff_sync_message(struct brw_compile *p,
 }
 
 static void brw_set_urb_message( struct brw_compile *p,
-                                struct brw_instruction *insn,
+                                brw_inst *insn,
                                  enum brw_urb_write_flags flags,
                                 unsigned msg_length,
                                 unsigned response_length,
@@ -664,7 +659,7 @@ static void brw_set_urb_message( struct brw_compile *p,
 
 void
 brw_set_dp_write_message(struct brw_compile *p,
-                        struct brw_instruction *insn,
+                        brw_inst *insn,
                         unsigned binding_table_index,
                         unsigned msg_control,
                         unsigned msg_type,
@@ -705,7 +700,7 @@ brw_set_dp_write_message(struct brw_compile *p,
 
 void
 brw_set_dp_read_message(struct brw_compile *p,
-                       struct brw_instruction *insn,
+                       brw_inst *insn,
                        unsigned binding_table_index,
                        unsigned msg_control,
                        unsigned msg_type,
@@ -740,7 +735,7 @@ brw_set_dp_read_message(struct brw_compile *p,
 
 void
 brw_set_sampler_message(struct brw_compile *p,
-                        struct brw_instruction *inst,
+                        brw_inst *inst,
                         unsigned binding_table_index,
                         unsigned sampler,
                         unsigned msg_type,
@@ -767,7 +762,7 @@ brw_set_sampler_message(struct brw_compile *p,
 
 static void
 gen7_set_dp_scratch_message(struct brw_compile *p,
-                            struct brw_instruction *inst,
+                            brw_inst *inst,
                             bool write,
                             bool dword,
                             bool invalidate_after_read,
@@ -791,16 +786,15 @@ gen7_set_dp_scratch_message(struct brw_compile *p,
 }
 
 #define next_insn brw_next_insn
-struct brw_instruction *
+brw_inst *
 brw_next_insn(struct brw_compile *p, unsigned opcode)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    if (p->nr_insn + 1 > p->store_size) {
       p->store_size <<= 1;
-      p->store = reralloc(p->mem_ctx, p->store,
-                          struct brw_instruction, p->store_size);
+      p->store = reralloc(p->mem_ctx, p->store, brw_inst, p->store_size);
    }
 
    p->next_insn_offset += 16;
@@ -811,24 +805,21 @@ brw_next_insn(struct brw_compile *p, unsigned opcode)
    return insn;
 }
 
-static struct brw_instruction *brw_alu1( struct brw_compile *p,
-                                        unsigned opcode,
-                                        struct brw_reg dest,
-                                        struct brw_reg src )
+static brw_inst *
+brw_alu1(struct brw_compile *p, unsigned opcode,
+         struct brw_reg dest, struct brw_reg src)
 {
-   struct brw_instruction *insn = next_insn(p, opcode);
+   brw_inst *insn = next_insn(p, opcode);
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src);
    return insn;
 }
 
-static struct brw_instruction *brw_alu2(struct brw_compile *p,
-                                       unsigned opcode,
-                                       struct brw_reg dest,
-                                       struct brw_reg src0,
-                                       struct brw_reg src1 )
+static brw_inst *
+brw_alu2(struct brw_compile *p, unsigned opcode,
+         struct brw_reg dest, struct brw_reg src0, struct brw_reg src1)
 {
-   struct brw_instruction *insn = next_insn(p, opcode);
+   brw_inst *insn = next_insn(p, opcode);
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, src1);
@@ -846,15 +837,12 @@ get_3src_subreg_nr(struct brw_reg reg)
    }
 }
 
-static struct brw_instruction *brw_alu3(struct brw_compile *p,
-                                       unsigned opcode,
-                                       struct brw_reg dest,
-                                       struct brw_reg src0,
-                                       struct brw_reg src1,
-                                       struct brw_reg src2)
+static brw_inst *
+brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
+         struct brw_reg src0, struct brw_reg src1, struct brw_reg src2)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *inst = next_insn(p, opcode);
+   brw_inst *inst = next_insn(p, opcode);
 
    gen7_convert_mrf_to_grf(p, &dest);
 
@@ -940,7 +928,7 @@ static struct brw_instruction *brw_alu3(struct brw_compile *p,
  * Convenience routines.
  */
 #define ALU1(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
+brw_inst *brw_##OP(struct brw_compile *p,              \
              struct brw_reg dest,                      \
              struct brw_reg src0)                      \
 {                                                      \
@@ -948,7 +936,7 @@ struct brw_instruction *brw_##OP(struct brw_compile *p,     \
 }
 
 #define ALU2(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
+brw_inst *brw_##OP(struct brw_compile *p,              \
              struct brw_reg dest,                      \
              struct brw_reg src0,                      \
              struct brw_reg src1)                      \
@@ -957,7 +945,7 @@ struct brw_instruction *brw_##OP(struct brw_compile *p,     \
 }
 
 #define ALU3(OP)                                       \
-struct brw_instruction *brw_##OP(struct brw_compile *p,        \
+brw_inst *brw_##OP(struct brw_compile *p,              \
              struct brw_reg dest,                      \
              struct brw_reg src0,                      \
              struct brw_reg src1,                      \
@@ -967,7 +955,7 @@ struct brw_instruction *brw_##OP(struct brw_compile *p,     \
 }
 
 #define ALU3F(OP)                                               \
-struct brw_instruction *brw_##OP(struct brw_compile *p,         \
+brw_inst *brw_##OP(struct brw_compile *p,         \
                                  struct brw_reg dest,           \
                                  struct brw_reg src0,           \
                                  struct brw_reg src1,           \
@@ -993,7 +981,7 @@ void brw_##OP(struct brw_compile *p,                                              \
              struct brw_reg src)                                             \
 {                                                                            \
    struct brw_context *brw = p->brw;                                         \
-   struct brw_instruction *rnd, *add;                                        \
+   brw_inst *rnd, *add;                                                              \
    rnd = next_insn(p, BRW_OPCODE_##OP);                                              \
    brw_set_dest(p, rnd, dest);                                               \
    brw_set_src0(p, rnd, src);                                                \
@@ -1045,10 +1033,9 @@ ROUND(RNDZ)
 ROUND(RNDE)
 
 
-struct brw_instruction *brw_ADD(struct brw_compile *p,
-                               struct brw_reg dest,
-                               struct brw_reg src0,
-                               struct brw_reg src1)
+brw_inst *
+brw_ADD(struct brw_compile *p, struct brw_reg dest,
+        struct brw_reg src0, struct brw_reg src1)
 {
    /* 6.2.2: add */
    if (src0.type == BRW_REGISTER_TYPE_F ||
@@ -1068,10 +1055,9 @@ struct brw_instruction *brw_ADD(struct brw_compile *p,
    return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1);
 }
 
-struct brw_instruction *brw_AVG(struct brw_compile *p,
-                                struct brw_reg dest,
-                                struct brw_reg src0,
-                                struct brw_reg src1)
+brw_inst *
+brw_AVG(struct brw_compile *p, struct brw_reg dest,
+        struct brw_reg src0, struct brw_reg src1)
 {
    assert(dest.type == src0.type);
    assert(src0.type == src1.type);
@@ -1090,10 +1076,9 @@ struct brw_instruction *brw_AVG(struct brw_compile *p,
    return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1);
 }
 
-struct brw_instruction *brw_MUL(struct brw_compile *p,
-                               struct brw_reg dest,
-                               struct brw_reg src0,
-                               struct brw_reg src1)
+brw_inst *
+brw_MUL(struct brw_compile *p, struct brw_reg dest,
+        struct brw_reg src0, struct brw_reg src1)
 {
    /* 6.32.38: mul */
    if (src0.type == BRW_REGISTER_TYPE_D ||
@@ -1128,7 +1113,7 @@ struct brw_instruction *brw_MUL(struct brw_compile *p,
 
 void brw_NOP(struct brw_compile *p)
 {
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_NOP);
    brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD));
    brw_set_src0(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD));
    brw_set_src1(p, insn, brw_imm_ud(0x0));
@@ -1142,13 +1127,13 @@ void brw_NOP(struct brw_compile *p)
  * Comparisons, if/else/endif
  */
 
-struct brw_instruction *brw_JMPI(struct brw_compile *p,
-                                 struct brw_reg index,
-                                 unsigned predicate_control)
+brw_inst *
+brw_JMPI(struct brw_compile *p, struct brw_reg index,
+         unsigned predicate_control)
 {
    const struct brw_context *brw = p->brw;
    struct brw_reg ip = brw_ip_reg();
-   struct brw_instruction *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index);
+   brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index);
 
    brw_inst_set_exec_size(brw, inst, BRW_EXECUTE_2);
    brw_inst_set_qtr_control(brw, inst, BRW_COMPRESSION_NONE);
@@ -1159,7 +1144,7 @@ struct brw_instruction *brw_JMPI(struct brw_compile *p,
 }
 
 static void
-push_if_stack(struct brw_compile *p, struct brw_instruction *inst)
+push_if_stack(struct brw_compile *p, brw_inst *inst)
 {
    p->if_stack[p->if_stack_depth] = inst - p->store;
 
@@ -1171,7 +1156,7 @@ push_if_stack(struct brw_compile *p, struct brw_instruction *inst)
    }
 }
 
-static struct brw_instruction *
+static brw_inst *
 pop_if_stack(struct brw_compile *p)
 {
    p->if_stack_depth--;
@@ -1179,7 +1164,7 @@ pop_if_stack(struct brw_compile *p)
 }
 
 static void
-push_loop_stack(struct brw_compile *p, struct brw_instruction *inst)
+push_loop_stack(struct brw_compile *p, brw_inst *inst)
 {
    if (p->loop_stack_array_size < p->loop_stack_depth) {
       p->loop_stack_array_size *= 2;
@@ -1194,7 +1179,7 @@ push_loop_stack(struct brw_compile *p, struct brw_instruction *inst)
    p->if_depth_in_loop[p->loop_stack_depth] = 0;
 }
 
-static struct brw_instruction *
+static brw_inst *
 get_inner_do_insn(struct brw_compile *p)
 {
    return &p->store[p->loop_stack[p->loop_stack_depth - 1]];
@@ -1213,11 +1198,11 @@ get_inner_do_insn(struct brw_compile *p)
  * When the matching 'endif' instruction is reached, the flags are
  * popped off.  If the stack is now empty, normal execution resumes.
  */
-struct brw_instruction *
+brw_inst *
 brw_IF(struct brw_compile *p, unsigned execute_size)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
 
@@ -1255,12 +1240,12 @@ brw_IF(struct brw_compile *p, unsigned execute_size)
 /* This function is only used for gen6-style IF instructions with an
  * embedded comparison (conditional modifier).  It is not used on gen7.
  */
-struct brw_instruction *
+brw_inst *
 gen6_IF(struct brw_compile *p, uint32_t conditional,
        struct brw_reg src0, struct brw_reg src1)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_IF);
 
@@ -1284,13 +1269,12 @@ gen6_IF(struct brw_compile *p, uint32_t conditional,
  */
 static void
 convert_IF_ELSE_to_ADD(struct brw_compile *p,
-                      struct brw_instruction *if_inst,
-                      struct brw_instruction *else_inst)
+                       brw_inst *if_inst, brw_inst *else_inst)
 {
    const struct brw_context *brw = p->brw;
 
    /* The next instruction (where the ENDIF would be, if it existed) */
-   struct brw_instruction *next_inst = &p->store[p->nr_insn];
+   brw_inst *next_inst = &p->store[p->nr_insn];
 
    assert(p->single_program_flow);
    assert(if_inst != NULL && brw_inst_opcode(brw, if_inst) == BRW_OPCODE_IF);
@@ -1326,9 +1310,7 @@ convert_IF_ELSE_to_ADD(struct brw_compile *p,
  */
 static void
 patch_IF_ELSE(struct brw_compile *p,
-             struct brw_instruction *if_inst,
-             struct brw_instruction *else_inst,
-             struct brw_instruction *endif_inst)
+              brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst)
 {
    struct brw_context *brw = p->brw;
 
@@ -1417,7 +1399,7 @@ void
 brw_ELSE(struct brw_compile *p)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_ELSE);
 
@@ -1450,10 +1432,10 @@ void
 brw_ENDIF(struct brw_compile *p)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = NULL;
-   struct brw_instruction *else_inst = NULL;
-   struct brw_instruction *if_inst = NULL;
-   struct brw_instruction *tmp;
+   brw_inst *insn = NULL;
+   brw_inst *else_inst = NULL;
+   brw_inst *if_inst = NULL;
+   brw_inst *tmp;
    bool emit_endif = true;
 
    /* In single program flow mode, we can express IF and ELSE instructions
@@ -1525,10 +1507,11 @@ brw_ENDIF(struct brw_compile *p)
    patch_IF_ELSE(p, if_inst, else_inst, insn);
 }
 
-struct brw_instruction *brw_BREAK(struct brw_compile *p)
+brw_inst *
+brw_BREAK(struct brw_compile *p)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_BREAK);
    if (brw->gen >= 6) {
@@ -1548,10 +1531,11 @@ struct brw_instruction *brw_BREAK(struct brw_compile *p)
    return insn;
 }
 
-struct brw_instruction *gen6_CONT(struct brw_compile *p)
+brw_inst *
+gen6_CONT(struct brw_compile *p)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_CONTINUE);
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
@@ -1565,10 +1549,11 @@ struct brw_instruction *gen6_CONT(struct brw_compile *p)
    return insn;
 }
 
-struct brw_instruction *brw_CONT(struct brw_compile *p)
+brw_inst *
+brw_CONT(struct brw_compile *p)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
    insn = next_insn(p, BRW_OPCODE_CONTINUE);
    brw_set_dest(p, insn, brw_ip_reg());
    brw_set_src0(p, insn, brw_ip_reg());
@@ -1581,10 +1566,11 @@ struct brw_instruction *brw_CONT(struct brw_compile *p)
    return insn;
 }
 
-struct brw_instruction *gen6_HALT(struct brw_compile *p)
+brw_inst *
+gen6_HALT(struct brw_compile *p)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    insn = next_insn(p, BRW_OPCODE_HALT);
    brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
@@ -1616,7 +1602,8 @@ struct brw_instruction *gen6_HALT(struct brw_compile *p)
  * For gen6, there's no more mask stack, so no need for DO.  WHILE
  * just points back to the first instruction of the loop.
  */
-struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size)
+brw_inst *
+brw_DO(struct brw_compile *p, unsigned execute_size)
 {
    struct brw_context *brw = p->brw;
 
@@ -1624,7 +1611,7 @@ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size)
       push_loop_stack(p, &p->store[p->nr_insn]);
       return &p->store[p->nr_insn];
    } else {
-      struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO);
+      brw_inst *insn = next_insn(p, BRW_OPCODE_DO);
 
       push_loop_stack(p, insn);
 
@@ -1650,11 +1637,11 @@ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size)
  * nesting, since it can always just point to the end of the block/current loop.
  */
 static void
-brw_patch_break_cont(struct brw_compile *p, struct brw_instruction *while_inst)
+brw_patch_break_cont(struct brw_compile *p, brw_inst *while_inst)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *do_inst = get_inner_do_insn(p);
-   struct brw_instruction *inst;
+   brw_inst *do_inst = get_inner_do_insn(p);
+   brw_inst *inst;
    int br = (brw->gen == 5) ? 2 : 1;
 
    for (inst = while_inst - 1; inst != do_inst; inst--) {
@@ -1672,10 +1659,11 @@ brw_patch_break_cont(struct brw_compile *p, struct brw_instruction *while_inst)
    }
 }
 
-struct brw_instruction *brw_WHILE(struct brw_compile *p)
+brw_inst *
+brw_WHILE(struct brw_compile *p)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn, *do_insn;
+   brw_inst *insn, *do_insn;
    unsigned br = 1;
 
    if (brw->gen >= 5)
@@ -1739,7 +1727,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p)
 void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *jmp_insn = &p->store[jmp_insn_idx];
+   brw_inst *jmp_insn = &p->store[jmp_insn_idx];
    unsigned jmpi = 1;
 
    if (brw->gen >= 5)
@@ -1763,7 +1751,7 @@ void brw_CMP(struct brw_compile *p,
             struct brw_reg src1)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_CMP);
 
    brw_inst_set_cond_modifier(brw, insn, conditional);
    brw_set_dest(p, insn, dest);
@@ -1800,7 +1788,7 @@ void gen4_math(struct brw_compile *p,
               unsigned precision )
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
    assert(brw->gen < 6);
 
@@ -1827,7 +1815,7 @@ void gen6_math(struct brw_compile *p,
               struct brw_reg src1)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_MATH);
 
    assert(brw->gen >= 6);
 
@@ -1927,7 +1915,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
 
    {
       struct brw_reg dest;
-      struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+      brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
       int send_commit_msg;
       struct brw_reg src_header = retype(brw_vec8_grf(0, 0),
                                         BRW_REGISTER_TYPE_UW);
@@ -2035,7 +2023,7 @@ brw_oword_block_read_scratch(struct brw_compile *p,
    }
 
    {
-      struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+      brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
       assert(brw_inst_pred_control(brw, insn) == 0);
       brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
@@ -2067,7 +2055,7 @@ gen7_block_read_scratch(struct brw_compile *p,
                         unsigned offset)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
    assert(brw_inst_pred_control(brw, insn) == BRW_PREDICATE_NONE);
 
    brw_inst_set_qtr_control(brw, insn, BRW_COMPRESSION_NONE);
@@ -2129,7 +2117,7 @@ void brw_oword_block_read(struct brw_compile *p,
                               2), BRW_REGISTER_TYPE_UD),
           brw_imm_ud(offset));
 
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
    /* cast dest to a uword[8] vector */
    dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW);
@@ -2168,7 +2156,7 @@ void brw_fb_WRITE(struct brw_compile *p,
                   bool header_present)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
    unsigned msg_type;
    struct brw_reg dest;
 
@@ -2230,7 +2218,7 @@ void brw_SAMPLE(struct brw_compile *p,
                unsigned return_format)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    if (msg_reg_nr != -1)
       gen6_resolve_implied_move(p, &src0, msg_reg_nr);
@@ -2284,7 +2272,7 @@ void brw_urb_WRITE(struct brw_compile *p,
                   unsigned swizzle)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
@@ -2330,7 +2318,7 @@ brw_find_next_block_end(struct brw_compile *p, int start_offset)
    for (offset = next_offset(brw, store, start_offset);
         offset < p->next_insn_offset;
         offset = next_offset(brw, store, offset)) {
-      struct brw_instruction *insn = store + offset;
+      brw_inst *insn = store + offset;
 
       switch (brw_inst_opcode(brw, insn)) {
       case BRW_OPCODE_ENDIF:
@@ -2362,7 +2350,7 @@ brw_find_loop_end(struct brw_compile *p, int start_offset)
    for (offset = next_offset(brw, store, start_offset);
         offset < p->next_insn_offset;
         offset = next_offset(brw, store, offset)) {
-      struct brw_instruction *insn = store + offset;
+      brw_inst *insn = store + offset;
 
       if (brw_inst_opcode(brw, insn) == BRW_OPCODE_WHILE) {
          int jip = brw->gen == 6 ? brw_inst_gen6_jump_count(brw, insn)
@@ -2391,7 +2379,7 @@ brw_set_uip_jip(struct brw_compile *p)
 
    for (offset = 0; offset < p->next_insn_offset;
         offset = next_offset(brw, store, offset)) {
-      struct brw_instruction *insn = store + offset;
+      brw_inst *insn = store + offset;
 
       if (brw_inst_cmpt_control(brw, insn)) {
         /* Fixups for compacted BREAK/CONTINUE not supported yet. */
@@ -2461,7 +2449,7 @@ void brw_ff_sync(struct brw_compile *p,
                   bool eot)
 {
    struct brw_context *brw = p->brw;
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
@@ -2499,7 +2487,7 @@ brw_svb_write(struct brw_compile *p,
               unsigned binding_table_index,
               bool   send_commit_msg)
 {
-   struct brw_instruction *insn;
+   brw_inst *insn;
 
    gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
@@ -2521,7 +2509,7 @@ brw_svb_write(struct brw_compile *p,
 
 static void
 brw_set_dp_untyped_atomic_message(struct brw_compile *p,
-                                  struct brw_instruction *insn,
+                                  brw_inst *insn,
                                   unsigned atomic_op,
                                   unsigned bind_table_index,
                                   unsigned msg_length,
@@ -2574,7 +2562,7 @@ brw_untyped_atomic(struct brw_compile *p,
                    unsigned msg_length,
                    unsigned response_length) {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
 
    brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UD));
    brw_set_src0(p, insn, retype(mrf, BRW_REGISTER_TYPE_UD));
@@ -2586,7 +2574,7 @@ brw_untyped_atomic(struct brw_compile *p,
 
 static void
 brw_set_dp_untyped_surface_read_message(struct brw_compile *p,
-                                        struct brw_instruction *insn,
+                                        brw_inst *insn,
                                         unsigned bind_table_index,
                                         unsigned msg_length,
                                         unsigned response_length,
@@ -2636,7 +2624,7 @@ brw_untyped_surface_read(struct brw_compile *p,
                          unsigned response_length)
 {
    const struct brw_context *brw = p->brw;
-   struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
 
    brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UD));
    brw_set_src0(p, insn, retype(mrf, BRW_REGISTER_TYPE_UD));
@@ -2670,7 +2658,7 @@ void brw_shader_time_add(struct brw_compile *p,
    brw_push_insn_state(p);
    brw_set_default_access_mode(p, BRW_ALIGN_1);
    brw_set_default_mask_control(p, BRW_MASK_DISABLE);
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_pop_insn_state(p);
 
    /* We use brw_vec1_reg and unmasked because we want to increment the given

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 9b39261..bdac2a2 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -78,7 +78,7 @@ fs_generator::patch_discard_jumps_to_fb_writes()
     * included GPU hangs and sparkly rendering on the piglit discard
     * tests.
     */
-   struct brw_instruction *last_halt = gen6_HALT(p);
+   brw_inst *last_halt = gen6_HALT(p);
    brw_inst_set_uip(brw, last_halt, 2);
    brw_inst_set_jip(brw, last_halt, 2);
 
@@ -86,7 +86,7 @@ fs_generator::patch_discard_jumps_to_fb_writes()
 
    foreach_list(node, &this->discard_halt_patches) {
       ip_record *patch_ip = (ip_record *)node;
-      struct brw_instruction *patch = &p->store[patch_ip->ip];
+      brw_inst *patch = &p->store[patch_ip->ip];
 
       assert(brw_inst_opcode(brw, patch) == BRW_OPCODE_HALT);
       /* HALT takes a half-instruction distance from the pre-incremented IP. */
@@ -841,7 +841,7 @@ fs_generator::generate_uniform_pull_constant_load_gen7(fs_inst *inst,
    brw_push_insn_state(p);
    brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_default_mask_control(p, BRW_MASK_DISABLE);
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_pop_insn_state(p);
 
    /* We use the SIMD4x2 mode because we want to end up with 4 components in
@@ -907,7 +907,7 @@ fs_generator::generate_varying_pull_constant_load(fs_inst *inst,
    struct brw_reg header = brw_vec8_grf(0, 0);
    gen6_resolve_implied_move(p, &header, inst->base_mrf);
 
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_inst_set_qtr_control(brw, send, BRW_COMPRESSION_NONE);
    brw_set_dest(p, send, retype(dst, BRW_REGISTER_TYPE_UW));
    brw_set_src0(p, send, header);
@@ -959,7 +959,7 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
       simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
    }
 
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, offset);
    brw_set_sampler_message(p, send,
@@ -1761,7 +1761,7 @@ fs_generator::generate_code(exec_list *instructions)
           * doesn't make sense.
           */
          assert(p->next_insn_offset == last_insn_offset + 16);
-         struct brw_instruction *last = &p->store[last_insn_offset / 16];
+         brw_inst *last = &p->store[last_insn_offset / 16];
          brw_inst_set_cond_modifier(brw, last, inst->conditional_mod);
       }
    }

diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index 320d59c..91986c3 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -347,7 +347,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
 {
    struct brw_compile *p = &c->func;
    struct brw_context *brw = p->brw;
-   struct brw_instruction *inst;
+   brw_inst *inst;
    c->prog_data.svbi_postincrement_value = num_verts;
 
    brw_ff_gs_alloc_regs(c, num_verts, true);

diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index 4425aef..e899286 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -39,29 +39,28 @@
 extern "C" {
 #endif
 
-struct brw_instruction;
-
-typedef struct {
+/* brw_context.h has a forward declaration of brw_inst, so name the struct. */
+typedef struct brw_inst {
    uint64_t data[2];
 } brw_inst;
 
-static inline uint64_t brw_inst_bits(struct brw_instruction *inst,
+static inline uint64_t brw_inst_bits(brw_inst *inst,
                                      unsigned high, unsigned low);
-static inline void brw_inst_set_bits(struct brw_instruction *inst,
+static inline void brw_inst_set_bits(brw_inst *inst,
                                      unsigned high, unsigned low,
                                      uint64_t value);
 
 #define FC(name, high, low, assertions)                       \
 static inline void                                            \
 brw_inst_set_##name(const struct brw_context *brw,            \
-                    struct brw_instruction *inst, uint64_t v) \
+                    brw_inst *inst, uint64_t v)               \
 {                                                             \
    assert(assertions);                                        \
    brw_inst_set_bits(inst, high, low, v);                     \
 }                                                             \
 static inline uint64_t                                        \
 brw_inst_##name(const struct brw_context *brw,                \
-                struct brw_instruction *inst)                 \
+                brw_inst *inst)                               \
 {                                                             \
    assert(assertions);                                        \
    return brw_inst_bits(inst, high, low);                     \
@@ -94,13 +93,13 @@ brw_inst_##name(const struct brw_context *brw,                \
 #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)\
 static inline void                                                            \
 brw_inst_set_##name(const struct brw_context *brw,                            \
-                    struct brw_instruction *inst, uint64_t value)             \
+                    brw_inst *inst, uint64_t value)                           \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)       \
    brw_inst_set_bits(inst, high, low, value);                                 \
 }                                                                             \
 static inline uint64_t                                                        \
-brw_inst_##name(const struct brw_context *brw, struct brw_instruction *inst)  \
+brw_inst_##name(const struct brw_context *brw, brw_inst *inst)                \
 {                                                                             \
    BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)       \
    return brw_inst_bits(inst, high, low);                                     \
@@ -247,7 +246,7 @@ F(3src_opcode,           6,  0)
  */
 static inline void
 brw_inst_set_uip(const struct brw_context *brw,
-                 struct brw_instruction *inst, int32_t value)
+                 brw_inst *inst, int32_t value)
 {
    assert(brw->gen >= 6);
 
@@ -261,7 +260,7 @@ brw_inst_set_uip(const struct brw_context *brw,
 }
 
 static inline int32_t
-brw_inst_uip(const struct brw_context *brw, struct brw_instruction *inst)
+brw_inst_uip(const struct brw_context *brw, brw_inst *inst)
 {
    assert(brw->gen >= 6);
 
@@ -274,7 +273,7 @@ brw_inst_uip(const struct brw_context *brw, struct brw_instruction *inst)
 
 static inline void
 brw_inst_set_jip(const struct brw_context *brw,
-                 struct brw_instruction *inst, int32_t value)
+                 brw_inst *inst, int32_t value)
 {
    assert(brw->gen >= 6);
 
@@ -288,7 +287,7 @@ brw_inst_set_jip(const struct brw_context *brw,
 }
 
 static inline int32_t
-brw_inst_jip(const struct brw_context *brw, struct brw_instruction *inst)
+brw_inst_jip(const struct brw_context *brw, brw_inst *inst)
 {
    assert(brw->gen >= 6);
 
@@ -532,19 +531,19 @@ F(ts_opcode,           MD( 0),  MD( 0))
  *  @{
  */
 static inline int
-brw_inst_imm_d(const struct brw_context *brw, struct brw_instruction *insn)
+brw_inst_imm_d(const struct brw_context *brw, brw_inst *insn)
 {
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline unsigned
-brw_inst_imm_ud(const struct brw_context *brw, struct brw_instruction *insn)
+brw_inst_imm_ud(const struct brw_context *brw, brw_inst *insn)
 {
    return brw_inst_bits(insn, 127, 96);
 }
 
 static inline float
-brw_inst_imm_f(const struct brw_context *brw, struct brw_instruction *insn)
+brw_inst_imm_f(const struct brw_context *brw, brw_inst *insn)
 {
    fi_type ft;
    ft.u = brw_inst_bits(insn, 127, 96);
@@ -553,21 +552,21 @@ brw_inst_imm_f(const struct brw_context *brw, struct brw_instruction *insn)
 
 static inline void
 brw_inst_set_imm_d(const struct brw_context *brw,
-                   struct brw_instruction *insn, int value)
+                   brw_inst *insn, int value)
 {
    return brw_inst_set_bits(insn, 127, 96, value);
 }
 
 static inline void
 brw_inst_set_imm_ud(const struct brw_context *brw,
-                    struct brw_instruction *insn, unsigned value)
+                    brw_inst *insn, unsigned value)
 {
    return brw_inst_set_bits(insn, 127, 96, value);
 }
 
 static inline void
 brw_inst_set_imm_f(const struct brw_context *brw,
-                   struct brw_instruction *insn, float value)
+                   brw_inst *insn, float value)
 {
    fi_type ft;
    ft.f = value;
@@ -580,7 +579,7 @@ brw_inst_set_imm_f(const struct brw_context *brw,
 #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
 static inline void                                                       \
 brw_inst_set_##reg##_ia1_addr_imm(const struct brw_context *brw,         \
-                                  struct brw_instruction *inst,          \
+                                  brw_inst *inst,                        \
                                   unsigned value)                        \
 {                                                                        \
    assert((value & ~0x3ff) == 0);                                        \
@@ -593,7 +592,7 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct brw_context *brw,         \
 }                                                                        \
 static inline unsigned                                                   \
 brw_inst_##reg##_ia1_addr_imm(const struct brw_context *brw,             \
-                              struct brw_instruction *inst)              \
+                              brw_inst *inst)                            \
 {                                                                        \
    if (brw->gen >= 8) {                                                  \
       return brw_inst_bits(inst, g8_high, g8_low) |                      \
@@ -612,8 +611,7 @@ BRW_IA1_ADDR_IMM(dst,   57, 48,  47,  56, 48)
 #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \
 static inline void                                                        \
 brw_inst_set_##reg##_ia16_addr_imm(const struct brw_context *brw,         \
-                                   struct brw_instruction *inst,          \
-                                   unsigned value)                        \
+                                   brw_inst *inst, unsigned value)        \
 {                                                                         \
    assert((value & ~0x3ff) == 0);                                         \
    if (brw->gen >= 8) {                                                   \
@@ -625,7 +623,7 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct brw_context *brw,         \
 }                                                                         \
 static inline unsigned                                                    \
 brw_inst_##reg##_ia16_addr_imm(const struct brw_context *brw,             \
-                               struct brw_instruction *inst)              \
+                               brw_inst *inst)                            \
 {                                                                         \
    if (brw->gen >= 8) {                                                   \
       return brw_inst_bits(inst, g8_high, g8_low) |                       \
@@ -649,10 +647,8 @@ BRW_IA16_ADDR_IMM(dst,   57, 52,  47,  56,  52)
  * Bits indices range from 0..127; fields may not cross 64-bit boundaries.
  */
 static inline uint64_t
-brw_inst_bits(struct brw_instruction *insn, unsigned high, unsigned low)
+brw_inst_bits(brw_inst *inst, unsigned high, unsigned low)
 {
-   brw_inst *inst = (brw_inst *) insn;
-
    /* We assume the field doesn't cross 64-bit boundaries. */
    const unsigned word = high / 64;
    assert(word == low / 64);
@@ -671,12 +667,8 @@ brw_inst_bits(struct brw_instruction *insn, unsigned high, unsigned low)
  * Bits indices range from 0..127; fields may not cross 64-bit boundaries.
  */
 static inline void
-brw_inst_set_bits(struct brw_instruction *insn,
-                  unsigned high, unsigned low,
-                  uint64_t value)
+brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value)
 {
-   brw_inst *inst = (brw_inst *) insn;
-
    const unsigned word = high / 64;
    assert(word == low / 64);
 

diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index a0f2646..586c2e6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -769,11 +769,6 @@ struct gen7_sf_clip_viewport {
 /* Instruction format for the execution units:
  */
 
-struct brw_instruction
-{
-   uint64_t data[2];
-};
-
 struct brw_compact_instruction {
    struct {
       unsigned opcode:7;          /*  0- 6 */

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index f6eb3d4..5247616 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -695,7 +695,7 @@ vec4_generator::generate_scratch_read(vec4_instruction *inst,
    /* Each of the 8 channel enables is considered for whether each
     * dword is written.
     */
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
@@ -766,7 +766,7 @@ vec4_generator::generate_scratch_write(vec4_instruction *inst,
    /* Each of the 8 channel enables is considered for whether each
     * dword is written.
     */
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
@@ -813,7 +813,7 @@ vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
    /* Each of the 8 channel enables is considered for whether each
     * dword is written.
     */
-   struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
@@ -839,7 +839,7 @@ vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
    assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
          surf_index.type == BRW_REGISTER_TYPE_UD);
 
-   brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
+   brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
    brw_set_dest(p, insn, dst);
    brw_set_src0(p, insn, offset);
    brw_set_sampler_message(p, insn,
@@ -1072,7 +1072,7 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
          assert(brw->gen == 6);
          gen6_IF(p, inst->conditional_mod, src[0], src[1]);
       } else {
-         struct brw_instruction *if_inst = brw_IF(p, BRW_EXECUTE_8);
+         brw_inst *if_inst = brw_IF(p, BRW_EXECUTE_8);
          brw_inst_set_pred_control(brw, if_inst, inst->predicate);
       }
       break;
@@ -1265,7 +1265,7 @@ vec4_generator::generate_code(exec_list *instructions)
                 !"conditional_mod, no_dd_check, or no_dd_clear set for IR "
                  "emitting more than 1 instruction");
 
-         struct brw_instruction *last = &p->store[pre_emit_nr_insn];
+         brw_inst *last = &p->store[pre_emit_nr_insn];
 
          if (inst->conditional_mod)
             brw_inst_set_cond_modifier(brw, last, inst->conditional_mod);

diff --git a/src/mesa/drivers/dri/i965/test_eu_compact.c b/src/mesa/drivers/dri/i965/test_eu_compact.c
index 5eee9e6..046a335 100644 (file)
--- a/src/mesa/drivers/dri/i965/test_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/test_eu_compact.c
@@ -29,7 +29,7 @@
 #include "brw_eu.h"
 
 static bool
-test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
+test_compact_instruction(struct brw_compile *p, brw_inst src)
 {
    struct brw_context *brw = p->brw;
 
@@ -37,7 +37,7 @@ test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
    memset(&dst, 0xd0, sizeof(dst));
 
    if (brw_try_compact_instruction(p, &dst, &src)) {
-      struct brw_instruction uncompacted;
+      brw_inst uncompacted;
 
       brw_uncompact_instruction(brw, &uncompacted, &dst);
       if (memcmp(&uncompacted, &src, sizeof(src))) {
@@ -67,7 +67,7 @@ test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
  * become meaningless once fuzzing twiddles a related bit.
  */
 static void
-clear_pad_bits(const struct brw_context *brw, struct brw_instruction *inst)
+clear_pad_bits(const struct brw_context *brw, brw_inst *inst)
 {
    if (brw_inst_opcode(brw, inst) != BRW_OPCODE_SEND &&
        brw_inst_opcode(brw, inst) != BRW_OPCODE_SENDC &&
@@ -80,7 +80,7 @@ clear_pad_bits(const struct brw_context *brw, struct brw_instruction *inst)
 }
 
 static bool
-skip_bit(const struct brw_context *brw, struct brw_instruction *src, int bit)
+skip_bit(const struct brw_context *brw, brw_inst *src, int bit)
 {
    /* pad bit */
    if (bit == 7)
@@ -113,15 +113,14 @@ skip_bit(const struct brw_context *brw, struct brw_instruction *src, int bit)
 }
 
 static bool
-test_fuzz_compact_instruction(struct brw_compile *p,
-                             struct brw_instruction src)
+test_fuzz_compact_instruction(struct brw_compile *p, brw_inst src)
 {
    for (int bit0 = 0; bit0 < 128; bit0++) {
       if (skip_bit(p->brw, &src, bit0))
         continue;
 
       for (int bit1 = 0; bit1 < 128; bit1++) {
-        struct brw_instruction instr = src;
+         brw_inst instr = src;
         uint32_t *bits = (uint32_t *)&instr;
 
          if (skip_bit(p->brw, &src, bit1))
@@ -233,7 +232,7 @@ gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
 
    brw_push_insn_state(p);
    brw_set_default_predicate_control(p, true);
-   struct brw_instruction *mov = brw_MOV(p, g0, g2);
+   brw_inst *mov = brw_MOV(p, g0, g2);
    brw_inst_set_flag_subreg_nr(p->brw, mov, 1);
    brw_pop_insn_state(p);
 }