Register Dst = MI->getOperand(0).getReg();
Register Src = MI->getOperand(1).getReg();
- LLT DstTy = MRI->getType(Dst);
LLT SrcTy = MRI->getType(Src);
- verifyVectorElementMatch(DstTy, SrcTy, MI);
int64_t Imm = MI->getOperand(2).getImm();
if (Imm <= 0) {
report("G_ASSERT_ZEXT size must be >= 1", MI);
break;
}
- LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
- verifyVectorElementMatch(DstTy, SrcTy, MI);
-
int64_t Imm = MI->getOperand(2).getImm();
if (Imm <= 0)
report("G_SEXT_INREG size must be >= 1", MI);
; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
; CHECK: instruction: %assert_zext_3:_(<2 x s32>) = G_ASSERT_ZEXT
- ; CHECK: *** Bad machine code: operand types must be all-vector or all-scalar ***
- ; CHECK: instruction: %assert_zext_3:_(<2 x s32>) = G_ASSERT_ZEXT
%assert_zext_3:_(<2 x s32>) = G_ASSERT_ZEXT %0, 8
- ; CHECK: *** Bad machine code: operand types must preserve number of vector elements ***
+ ; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
; CHECK: instruction: %assert_zext_4:_(<2 x s32>) = G_ASSERT_ZEXT
%assert_zext_4:_(<2 x s32>) = G_ASSERT_ZEXT %1, 8
; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
; CHECK: instruction: %4:gpr(<2 x s32>) = G_SEXT_INREG
- ; CHECK: *** Bad machine code: operand types must be all-vector or all-scalar ***
- ; CHECK: instruction: %4:gpr(<2 x s32>) = G_SEXT_INREG
%4(<2 x s32>) = G_SEXT_INREG %0, 8
- ; CHECK: *** Bad machine code: operand types must preserve number of vector elements ***
+ ; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
; CHECK: instruction: %5:gpr(<2 x s32>) = G_SEXT_INREG
%5(<2 x s32>) = G_SEXT_INREG %1, 8