dmaengine: at_xdmac: restore the content of grws register
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Tue, 14 Feb 2023 15:18:24 +0000 (17:18 +0200)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Apr 2023 17:48:44 +0000 (23:18 +0530)
In case the system suspends to a deep sleep state where power to DMA
controller is cut-off we need to restore the content of GRWS register.
This is a write only register and writing bit X tells the controller
to suspend read and write requests for channel X. Thus set GRWS before
restoring the content of GE (Global Enable) regiter.

Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230214151827.1050280-5-claudiu.beznea@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/at_xdmac.c

index fa1e2e0..34c004a 100644 (file)
@@ -2211,6 +2211,15 @@ static int __maybe_unused atmel_xdmac_resume(struct device *dev)
                                        return ret;
                                at_xdmac_device_resume_internal(atchan);
                        }
+
+                       /*
+                        * We may resume from a deep sleep state where power
+                        * to DMA controller is cut-off. Thus, restore the
+                        * suspend state of channels set though dmaengine API.
+                        */
+                       else if (at_xdmac_chan_is_paused(atchan))
+                               at_xdmac_device_pause_set(atxdmac, atchan);
+
                        at_xdmac_chan_write(atchan, AT_XDMAC_CNDA, atchan->save_cnda);
                        at_xdmac_chan_write(atchan, AT_XDMAC_CNDC, atchan->save_cndc);
                        at_xdmac_chan_write(atchan, AT_XDMAC_CIE, atchan->save_cim);