drm/amd/display: limit DPIA link rate to HBR3
authorPeichen Huang <peichen.huang@amd.com>
Wed, 31 May 2023 05:36:14 +0000 (13:36 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Jun 2023 21:16:35 +0000 (17:16 -0400)
[Why]
DPIA doesn't support UHBR, driver should not enable UHBR
for dp tunneling

[How]
limit DPIA link rate to HBR3

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Peichen Huang <peichen.huang@amd.com>
Reviewed-by: Mustapha Ghaddar <Mustapha.Ghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/link/link_detection.c

index a131e30fd7d6a01036b55598662b50345dbc34e1..d471d58aba92cba441915c0757072136ca0f8c64 100644 (file)
@@ -980,6 +980,11 @@ static bool detect_link_and_local_sink(struct dc_link *link,
                                        (link->dpcd_caps.dongle_type !=
                                                        DISPLAY_DONGLE_DP_HDMI_CONVERTER))
                                converter_disable_audio = true;
+
+                       /* limited link rate to HBR3 for DPIA until we implement USB4 V2 */
+                       if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA &&
+                                       link->reported_link_cap.link_rate > LINK_RATE_HIGH3)
+                               link->reported_link_cap.link_rate = LINK_RATE_HIGH3;
                        break;
                }