isl: disable Yf/Ys/Tile64 tilings for 1D images

The ICL+ PRMs show that this is not a supported thing anymore for
Ys/Yf and there isn't really much use for it in Vulkan/Sparse.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>

diff --git a/src/intel/isl/isl_gfx12.c b/src/intel/isl/isl_gfx12.c
index 47166f5..3be3c25 100644 (file)
--- a/src/intel/isl/isl_gfx12.c
+++ b/src/intel/isl/isl_gfx12.c
@@ -82,6 +82,20 @@ isl_gfx125_filter_tiling(const struct isl_device *dev,
    if (info->dim != ISL_SURF_DIM_2D)
       *flags &= ~ISL_TILING_X_BIT;
 
+   /* From ATS-M PRMs, Volume 2d: Command Reference: Structures,
+    * RENDER_SURFACE_STATE:TileMode :
+    *
+    *    "If Surface Type is SURFTYPE_1D this field must be TILEMODE_LINEAR,
+    *     unless Sampler Legacy 1D Map Layout Disable is set to 0, in which
+    *     case TILEMODE_YMAJOR is also allowed. Horizontal Alignment must be
+    *     programmed for the required alignment between MIPs. MIP tails are
+    *     not supported."
+    *
+    * Tile4 is the replacement for TileY0 on ACM.
+    */
+   if (info->dim == ISL_SURF_DIM_1D)
+      *flags &= ISL_TILING_LINEAR_BIT | ISL_TILING_4_BIT;
+
    /* ISL only implements Tile64 support for 1D and 2D surfaces. */
    if (info->dim == ISL_SURF_DIM_3D)
       *flags &= ~ISL_TILING_64_BIT;

diff --git a/src/intel/isl/isl_gfx7.c b/src/intel/isl/isl_gfx7.c
index 8795400..dadf81f 100644 (file)
--- a/src/intel/isl/isl_gfx7.c
+++ b/src/intel/isl/isl_gfx7.c
@@ -263,6 +263,19 @@ isl_gfx6_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_W_BIT;
    }
 
+   /* ICL PRMs, Volume 5: Memory Data Formats, 1D Alignment Requirements:
+    *
+    *    Tiled Resource Mode | Bits per Element | Horizontal Alignment
+    *    TRMODE_NONE         |      Any         |         64
+    *
+    * The table does not list any other tiled resource modes. On the other hand,
+    * the SKL PRM has entries for TRMODE_64KB and TRMODE_4KB. This suggests that
+    * standard tilings are no longer officially supported for 1D surfaces. We don't
+    * really have a use-case for it anyway, so we choose to match the later docs.
+    */
+   if (info->dim == ISL_SURF_DIM_1D)
+      *flags &= ~ISL_TILING_STD_Y_MASK;
+
    /* MCS buffers are always Y-tiled */
    if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS)
       *flags &= ISL_TILING_Y0_BIT;